From e0269579a5b546b8f4e9ede82dc1cc3fa3796e02 Mon Sep 17 00:00:00 2001 From: Markus Klotzbücher Date: Tue, 7 Feb 2006 20:04:48 +0100 Subject: This is the first commit for the u-boot zylonite port. The following has be done so far: * created zylonite board dir (based on lubbock) * extended some - but not all pxa sources and headers for Intel Monahans support (CONFIG_CPU_MONAHANS) * created Makefile zylonite target + MAKEALL entry * added some debug nonsense, remove later, grep for mk@tbd Status: compiles (eldk-4.0), and can be started with BDI, but runs forever and doesn't halt at breakpoints. Hmmm... --- cpu/pxa/cpu.c | 3 +++ cpu/pxa/serial.c | 12 ++++++++++++ cpu/pxa/start.S | 44 ++++++++++++++++++++++++++++++++------------ 3 files changed, 47 insertions(+), 12 deletions(-) (limited to 'cpu/pxa') diff --git a/cpu/pxa/cpu.c b/cpu/pxa/cpu.c index d1551ddc38..445ba18756 100644 --- a/cpu/pxa/cpu.c +++ b/cpu/pxa/cpu.c @@ -143,6 +143,7 @@ int dcache_status (void) return 0; /* always off */ } +#ifndef CONFIG_CPU_MONAHANS void set_GPIO_mode(int gpio_mode) { int gpio = gpio_mode & GPIO_MD_MASK_NR; @@ -160,3 +161,5 @@ void set_GPIO_mode(int gpio_mode) gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2)); GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2)); } +#endif /* CONFIG_CPU_MONAHANS */ + diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c index cedebfe496..9bf2a7cf4f 100644 --- a/cpu/pxa/serial.c +++ b/cpu/pxa/serial.c @@ -54,7 +54,11 @@ void serial_setbrg (void) hang (); #ifdef CONFIG_FFUART +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_22_FFUART; +#else CKEN |= CKEN6_FFUART; +#endif /* CONFIG_CPU_MONAHANS */ FFIER = 0; /* Disable for now */ FFFCR = 0; /* No fifos enabled */ @@ -68,7 +72,11 @@ void serial_setbrg (void) FFIER = IER_UUE; /* Enable FFUART */ #elif defined(CONFIG_BTUART) +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_21_BTUART; +#else CKEN |= CKEN7_BTUART; +#endif /* CONFIG_CPU_MONAHANS */ BTIER = 0; BTFCR = 0; @@ -82,7 +90,11 @@ void serial_setbrg (void) BTIER = IER_UUE; /* Enable BFUART */ #elif defined(CONFIG_STUART) +#ifdef CONFIG_CPU_MONAHANS + CKENA |= CKENA_23_STUART; +#else CKEN |= CKEN5_STUART; +#endif /* CONFIG_CPU_MONAHANS */ STIER = 0; STFCR = 0; diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index a8cc0800b0..994082691d 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -190,10 +190,10 @@ cpuspeed: .word CFG_CPUSPEED #endif - /* RS: ??? */ - .macro CPWAIT - mrc p15,0,r0,c2,c0,0 - mov r0,r0 + /* takes care the CP15 update has taken place */ + .macro CPWAIT reg + mrc p15,0,\reg,c2,c0,0 + mov \reg,\reg sub pc,pc,#4 .endm @@ -201,13 +201,28 @@ cpuspeed: .word CFG_CPUSPEED cpu_init_crit: /* mask all IRQs */ +#ifndef CONFIG_CPU_MONAHANS + ldr r0, IC_BASE mov r1, #0x00 str r1, [r0, #ICMR] +#else + /* Step 1 - Enable CP6 permission */ + mrc p15, 0, r1, c15, c1, 0 @ read CPAR + orr r1, r1, #0x40 + mcr p15, 0, r1, c15, c1, 0 + CPWAIT r1 + + /* Step 2 - Mask ICMR & ICMR2 */ + mov r1, #0 + mcr p6, 0, r1, c1, c0, 0 @ ICMR + mcr p6, 0, r1, c7, c0, 0 @ ICMR2 +#endif -#if defined(CFG_CPUSPEED) - - /* set clock speed */ +#ifndef CONFIG_CPU_MONAHANS +#ifdef CFG_CPUSPEED + + /* set clock speed tbd@mk: required for monahans? */ ldr r0, CC_BASE ldr r1, cpuspeed str r1, [r0, #CCCR] @@ -215,7 +230,10 @@ cpu_init_crit: mcr p14, 0, r0, c6, c0, 0 setspeed_done: -#endif + +#endif /* CFG_CPUSPEED */ +#endif /* CONFIG_CPU_MONAHANS */ + /* * before relocating, we have to setup RAM timing @@ -227,19 +245,21 @@ setspeed_done: mov lr, ip /* Memory interfaces are working. Disable MMU and enable I-cache. */ + /* mk: hmm, this is not in the monahans docs, leave it now but + * check here if it doesn't work :-) */ ldr r0, =0x2001 /* enable access to all coproc. */ mcr p15, 0, r0, c15, c1, 0 - CPWAIT + CPWAIT r0 mcr p15, 0, r0, c7, c10, 4 /* drain the write & fill buffers */ - CPWAIT + CPWAIT r0 mcr p15, 0, r0, c7, c7, 0 /* flush Icache, Dcache and BTB */ - CPWAIT + CPWAIT r0 mcr p15, 0, r0, c8, c7, 0 /* flush instuction and data TLBs */ - CPWAIT + CPWAIT r0 /* Enable the Icache */ /* -- cgit From 00c35bd2140f02111612771ca9c53dc8b58205eb Mon Sep 17 00:00:00 2001 From: Markus Klotzbücher Date: Tue, 28 Feb 2006 22:51:01 +0100 Subject: Added GPIO initialization of DF signal. Still not working. --- cpu/pxa/config.mk | 1 + 1 file changed, 1 insertion(+) (limited to 'cpu/pxa') diff --git a/cpu/pxa/config.mk b/cpu/pxa/config.mk index fb810ca7c2..f30a1fe1ad 100644 --- a/cpu/pxa/config.mk +++ b/cpu/pxa/config.mk @@ -33,4 +33,5 @@ PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) +# for gcc-3x: PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -- cgit From e8cd00835ebcae4681e9a673bf33318687756eff Mon Sep 17 00:00:00 2001 From: Markus Klotzbücher Date: Tue, 28 Feb 2006 23:11:07 +0100 Subject: All subsystem clocks not immediately need are turned at reset. --- cpu/pxa/start.S | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'cpu/pxa') diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 994082691d..159447efe3 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -30,6 +30,7 @@ #include #include +#include .globl _start _start: b reset @@ -217,6 +218,15 @@ cpu_init_crit: mov r1, #0 mcr p6, 0, r1, c1, c0, 0 @ ICMR mcr p6, 0, r1, c7, c0, 0 @ ICMR2 + + /* turn off all clocks but the ones we will definitly require */ + ldr r1, =CKENA + ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | CKENA_8_DMC) + str r2, [r1] + ldr r1, =CKENB + ldr r2, =(CKENB_6_IRQ) + str r2, [r1] + #endif #ifndef CONFIG_CPU_MONAHANS -- cgit From bf7cac033b27589c7de71a5f37f0c8e872ad489a Mon Sep 17 00:00:00 2001 From: Markus Klotzbücher Date: Sat, 4 Mar 2006 18:35:51 +0100 Subject: Lots of new stuff: * Debug message can be turned on and off. * Waiting for events now times out. * Implemented RESET command. * Added appropriate nand_bbt_descriptor and nand_oobinfo. Remaining Problems: * Read Status still behaves weird an returns invalid stuff sometimes. * ECC Placement does not respect our scheme in nand_oobinfo. --- cpu/pxa/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'cpu/pxa') diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 159447efe3..0eb811f20e 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -189,7 +189,7 @@ cpuspeed: .word CFG_CPUSPEED #else #error "You have to define CFG_CPUSPEED!!" #endif - + /* takes care the CP15 update has taken place */ .macro CPWAIT reg -- cgit From 43638c674a1bc57eef41439e87c281269a08cb16 Mon Sep 17 00:00:00 2001 From: Markus Klotzbücher Date: Mon, 6 Mar 2006 15:04:25 +0100 Subject: Cleanup of NAND support of delta board using the Monahans Data Flash Controller. --- cpu/pxa/start.S | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'cpu/pxa') diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 0eb811f20e..7e5a1ee495 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -165,7 +165,15 @@ _start_armboot: .word start_armboot /* - setup memory timing */ /* */ /****************************************************************************/ - +/* mk@tbd: Fix this! */ +#ifdef CONFIG_CPU_MONAHANS +#undef ICMR +#undef OSMR3 +#undef OSCR +#undef OWER +#undef OIER +#endif + /* Interrupt-Controller base address */ IC_BASE: .word 0x40d00000 #define ICMR 0x04 -- cgit From 0be248fa9a32667d29b0eb1bad77bbd372903e61 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 7 Mar 2006 00:22:36 +0100 Subject: Cleanup (get rid of debug code that sneaked in) --- cpu/pxa/config.mk | 1 - 1 file changed, 1 deletion(-) (limited to 'cpu/pxa') diff --git a/cpu/pxa/config.mk b/cpu/pxa/config.mk index f30a1fe1ad..fb810ca7c2 100644 --- a/cpu/pxa/config.mk +++ b/cpu/pxa/config.mk @@ -33,5 +33,4 @@ PLATFORM_CPPFLAGS += -march=armv5 -mtune=xscale # # ======================================================================== PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) -# for gcc-3x: PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32) PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -- cgit