From 3524d47c7906be1e3d8502b7af39e4c038584286 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 22 Sep 2016 07:42:20 +0900 Subject: clk: uniphier: constify clock data arrays/structures Clarify these clock data are constant. Signed-off-by: Masahiro Yamada --- drivers/clk/uniphier/clk-uniphier-mio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'drivers/clk/uniphier/clk-uniphier-mio.c') diff --git a/drivers/clk/uniphier/clk-uniphier-mio.c b/drivers/clk/uniphier/clk-uniphier-mio.c index 2eea5ebc2a..40c1b78e5e 100644 --- a/drivers/clk/uniphier/clk-uniphier-mio.c +++ b/drivers/clk/uniphier/clk-uniphier-mio.c @@ -115,7 +115,7 @@ .data = 0x00020000, \ } -static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { +static const struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_GATE_SD(0, 0), UNIPHIER_MIO_CLK_GATE_SD(1, 1), UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */ @@ -126,13 +126,13 @@ static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = { UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */ }; -static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = { +static const struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = { UNIPHIER_MIO_CLK_RATE_SD(0, 0), UNIPHIER_MIO_CLK_RATE_SD(1, 1), UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */ }; -static struct uniphier_clk_soc_data uniphier_mio_clk_data = { +static const struct uniphier_clk_soc_data uniphier_mio_clk_data = { .gate = uniphier_mio_clk_gate, .nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate), .rate = uniphier_mio_clk_rate, -- cgit