From 01471d538fb163f472a769f21267d7676c91267c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 4 Nov 2009 01:29:04 -0600 Subject: Revert "ppc/85xx/pci: fsl_pci_init: pcie agent mode support" This reverts commit 70ed869ea5f6b1d13d7b140c83ec0dcd8a127ddc. There isn't any need to modify the API for fsl_pci_init_port to pass the status of host/agent(end-point) status. We can determine that internally to fsl_pci_init_port. Revert the patch that makes the API change. Signed-off-by: Kumar Gala --- drivers/pci/fsl_pci_init.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) (limited to 'drivers/pci') diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 8fbab68a20..87944bfad5 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -1,5 +1,5 @@ /* - * Copyright 2007-2009 Freescale Semiconductor, Inc. + * Copyright 2007 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -413,27 +413,13 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) } int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno, int pcie_ep) + struct pci_controller *hose, int busno) { volatile ccsr_fsl_pci_t *pci; struct pci_region *r; pci = (ccsr_fsl_pci_t *) pci_info->regs; - if (pcie_ep) { - volatile pit_t *pi = &pci->pit[2]; - - pci_setup_indirect(hose, (u32)&pci->cfg_addr, - (u32)&pci->cfg_data); - out_be32(&pi->pitar, 0); - out_be32(&pi->piwbar, 0); - out_be32(&pi->piwar, PIWAR_EN | PIWAR_LOCAL | - PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP | PIWAR_IWS_4K); - - fsl_pci_config_unlock(hose); - return 0; - } - /* on non-PCIe controllers we don't have pme_msg_det so this code * should do nothing since the read will return 0 */ -- cgit From 715d8f7608f77c93f1807a032644893fd5b6d08b Mon Sep 17 00:00:00 2001 From: Ed Swarthout Date: Mon, 2 Nov 2009 09:05:49 -0600 Subject: fsl_pci_init_port end-point initialization is broken commit 70ed869e broke fsl pcie end-point initialization. Returning 0 is not correct. The function must return the first free bus number for the next controller. fsl_pci_init() must still be called and a bus allocated even if the controller is an end-point. Signed-off-by: Ed Swarthout Acked-by: Vivek Mahajan Signed-off-by: Kumar Gala --- drivers/pci/fsl_pci_init.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) (limited to 'drivers/pci') diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 87944bfad5..170cc257cd 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -1,5 +1,5 @@ /* - * Copyright 2007 Freescale Semiconductor, Inc. + * Copyright 2007-2009 Freescale Semiconductor, Inc. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -42,6 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; #define FSL_PCI_PBFR 0x44 #define FSL_PCIE_CAP_ID 0x4c #define FSL_PCIE_CFG_RDY 0x4b0 +#define FSL_PROG_IF_AGENT 0x1 void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); @@ -412,6 +413,16 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) } } +int fsl_is_pci_agent(struct pci_controller *hose) +{ + u8 prog_if; + pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); + + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if); + + return (prog_if == FSL_PROG_IF_AGENT); +} + int fsl_pci_init_port(struct fsl_pci_info *pci_info, struct pci_controller *hose, int busno) { @@ -450,6 +461,11 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); + if (fsl_is_pci_agent(hose)) { + fsl_pci_config_unlock(hose); + hose->last_busno = hose->first_busno; + } + printf(" PCIE%x on bus %02x - %02x\n", pci_info->pci_num, hose->first_busno, hose->last_busno); -- cgit