From 205a0988d8fd778c60746c34c2f17dbd2b7cd0d2 Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Mon, 29 Jun 2009 15:25:18 +0530 Subject: nand: Add Marvell Kirkwood NAND driver This patch adds a NAND driver for the Marvell Kirkwood SoC's Signed-off-by: Prafulla Wadaskar Acked-by: Scott Wood --- drivers/mtd/nand/Makefile | 1 + drivers/mtd/nand/kirkwood_nand.c | 82 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 drivers/mtd/nand/kirkwood_nand.c (limited to 'drivers') diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 71dd5b9b85..d4d3948532 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -40,6 +40,7 @@ COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o COBJS-$(CONFIG_NAND_DAVINCI) += davinci_nand.o COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_nand.o COBJS-$(CONFIG_NAND_FSL_UPM) += fsl_upm.o +COBJS-$(CONFIG_NAND_KIRKWOOD) += kirkwood_nand.o COBJS-$(CONFIG_NAND_MPC5121_NFC) += mpc5121_nfc.o COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.c diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c new file mode 100644 index 0000000000..376378ed3f --- /dev/null +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -0,0 +1,82 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Prafulla Wadaskar + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +/* NAND Flash Soc registers */ +struct kwnandf_registers { + u32 rd_params; /* 0x10418 */ + u32 wr_param; /* 0x1041c */ + u8 pad[0x10470 - 0x1041c - 4]; + u32 ctrl; /* 0x10470 */ +}; + +static struct kwnandf_registers *nf_reg = + (struct kwnandf_registers *)KW_NANDF_BASE; + +/* + * hardware specific access to control-lines/bits + */ +#define NAND_ACTCEBOOT_BIT 0x02 + +static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd, + unsigned int ctrl) +{ + struct nand_chip *nc = mtd->priv; + u32 offs; + + if (cmd == NAND_CMD_NONE) + return; + + if (ctrl & NAND_CLE) + offs = (1 << 0); /* Commands with A[1:0] == 01 */ + else if (ctrl & NAND_ALE) + offs = (1 << 1); /* Addresses with A[1:0] == 10 */ + else + return; + + writeb(cmd, nc->IO_ADDR_W + offs); +} + +void kw_nand_select_chip(struct mtd_info *mtd, int chip) +{ + u32 data; + + data = readl(&nf_reg->ctrl); + data |= NAND_ACTCEBOOT_BIT; + writel(data, &nf_reg->ctrl); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING; + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = kw_nand_hwcontrol; + nand->chip_delay = 30; + nand->select_chip = kw_nand_select_chip; + return 0; +} -- cgit From 7984967a9405672db1581402d2c2cfae268d1a67 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Tue, 16 Jun 2009 05:26:25 -0400 Subject: usb: musb: drop old musb read/write prototypes These functions are no longer defined, so remove their prototypes. Signed-off-by: Mike Frysinger Signed-off-by: Remy Bohmer --- drivers/usb/musb/musb_core.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index b81c5365ec..f9da3f0b29 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h @@ -307,10 +307,4 @@ extern void musb_configure_ep(struct musb_epinfo *epinfo, u8 cnt); extern void write_fifo(u8 ep, u32 length, void *fifo_data); extern void read_fifo(u8 ep, u32 length, void *fifo_data); -/* extern functions */ -extern inline void musb_writew(u32 offset, u16 value); -extern inline void musb_writeb(u32 offset, u8 value); -extern inline u16 musb_readw(u32 offset); -extern inline u8 musb_readb(u32 offset); - #endif /* __MUSB_HDRC_DEFS_H__ */ -- cgit From c3a012ce65818beb274195cd47f31ed80d0fbaa5 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Tue, 16 Jun 2009 05:26:27 -0400 Subject: usb: musb: add timeout via CONFIG_MUSB_TIMEOUT Signed-off-by: Bryan Wu Signed-off-by: Mike Frysinger Signed-off-by: Remy Bohmer --- drivers/usb/musb/musb_hcd.c | 31 +++++++++++++++++++++++++++++++ drivers/usb/musb/musb_hcd.h | 4 ++++ 2 files changed, 35 insertions(+) (limited to 'drivers') diff --git a/drivers/usb/musb/musb_hcd.c b/drivers/usb/musb/musb_hcd.c index 352a0d4eb0..19d978b245 100644 --- a/drivers/usb/musb/musb_hcd.c +++ b/drivers/usb/musb/musb_hcd.c @@ -111,6 +111,7 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask) { u16 csr; int result = 1; + int timeout = CONFIG_MUSB_TIMEOUT; while (result > 0) { csr = readw(&musbr->txcsr); @@ -152,7 +153,17 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask) } break; } + + /* Check the timeout */ + if (--timeout) + udelay(1); + else { + dev->status = USB_ST_CRC_ERR; + result = -1; + break; + } } + return result; } @@ -162,6 +173,7 @@ static int wait_until_ep0_ready(struct usb_device *dev, u32 bit_mask) static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep) { u16 csr; + int timeout = CONFIG_MUSB_TIMEOUT; do { if (check_stall(ep, 1)) { @@ -174,6 +186,15 @@ static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep) dev->status = USB_ST_CRC_ERR; return 0; } + + /* Check the timeout */ + if (--timeout) + udelay(1); + else { + dev->status = USB_ST_CRC_ERR; + return -1; + } + } while (csr & MUSB_TXCSR_TXPKTRDY); return 1; } @@ -184,6 +205,7 @@ static u8 wait_until_txep_ready(struct usb_device *dev, u8 ep) static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep) { u16 csr; + int timeout = CONFIG_MUSB_TIMEOUT; do { if (check_stall(ep, 0)) { @@ -196,6 +218,15 @@ static u8 wait_until_rxep_ready(struct usb_device *dev, u8 ep) dev->status = USB_ST_CRC_ERR; return 0; } + + /* Check the timeout */ + if (--timeout) + udelay(1); + else { + dev->status = USB_ST_CRC_ERR; + return -1; + } + } while (!(csr & MUSB_RXCSR_RXPKTRDY)); return 1; } diff --git a/drivers/usb/musb/musb_hcd.h b/drivers/usb/musb/musb_hcd.h index bb83311b01..b7f571d037 100644 --- a/drivers/usb/musb/musb_hcd.h +++ b/drivers/usb/musb/musb_hcd.h @@ -30,6 +30,10 @@ extern unsigned char new[]; #endif +#ifndef CONFIG_MUSB_TIMEOUT +# define CONFIG_MUSB_TIMEOUT 100000 +#endif + /* This defines the endpoint number used for control transfers */ #define MUSB_CONTROL_EP 0 -- cgit From 08066152735417fc55a5c9de2cec0714c529e4f3 Mon Sep 17 00:00:00 2001 From: Vivek Mahajan Date: Fri, 19 Jun 2009 17:56:00 +0530 Subject: mpc8xxx: USB: fix: access of ehci struct elements This patch fixes the access to the 'ehci' struct elements which should have been taken care off in 4ef01010aa4799c759d75e67007fdd3a38c88c8a Sorry about that. Signed-off-by: Vivek Mahajan Signed-off-by: Remy Bohmer --- drivers/usb/host/ehci-fsl.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index bf148c4e24..c674929725 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -41,15 +41,15 @@ int ehci_hcd_init(void) struct usb_ehci *ehci; ehci = (struct usb_ehci *)CONFIG_SYS_MPC8xxx_USB_ADDR; - hccr = (struct ehci_hccr *)((uint32_t)ehci->caplength); + hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength); hcor = (struct ehci_hcor *)((uint32_t) hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); /* Set to Host mode */ - setbits_le32((void *)ehci->usbmode, CM_HOST); + setbits_le32(&ehci->usbmode, CM_HOST); - out_be32((void *)ehci->snoop1, SNOOP_SIZE_2GB); - out_be32((void *)ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); + out_be32(&ehci->snoop1, SNOOP_SIZE_2GB); + out_be32(&ehci->snoop2, 0x80000000 | SNOOP_SIZE_2GB); /* Init phy */ if (!strcmp(getenv("usb_phy_type"), "utmi")) @@ -58,13 +58,13 @@ int ehci_hcd_init(void) out_le32(&(hcor->or_portsc[0]), PORT_PTS_ULPI); /* Enable interface. */ - setbits_be32((void *)ehci->control, USB_EN); + setbits_be32(&ehci->control, USB_EN); - out_be32((void *)ehci->prictrl, 0x0000000c); - out_be32((void *)ehci->age_cnt_limit, 0x00000040); - out_be32((void *)ehci->sictrl, 0x00000001); + out_be32(&ehci->prictrl, 0x0000000c); + out_be32(&ehci->age_cnt_limit, 0x00000040); + out_be32(&ehci->sictrl, 0x00000001); - in_le32((void *)ehci->usbmode); + in_le32(&ehci->usbmode); return 0; } -- cgit From 1d8937a469bfeb55ca1f6d89a4e7cd2dfee3cf17 Mon Sep 17 00:00:00 2001 From: Prafulla Wadaskar Date: Mon, 29 Jun 2009 20:56:43 +0530 Subject: usb: add Marvell Kirkwood ehci host controller driver This driver is tested on Sheevaplug platform Signed-off-by: Prafulla Wadaskar Signed-off-by: Remy Bohmer --- drivers/usb/host/Makefile | 1 + drivers/usb/host/ehci-kirkwood.c | 108 +++++++++++++++++++++++++++++++++++++++ 2 files changed, 109 insertions(+) create mode 100644 drivers/usb/host/ehci-kirkwood.c (limited to 'drivers') diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile index ec1d689b35..940d4a8b91 100644 --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile @@ -37,6 +37,7 @@ COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o COBJS-$(CONFIG_USB_EHCI) += ehci-hcd.o COBJS-$(CONFIG_USB_EHCI_FSL) += ehci-fsl.o COBJS-$(CONFIG_USB_EHCI_IXP4XX) += ehci-ixp.o +COBJS-$(CONFIG_USB_EHCI_KIRKWOOD) += ehci-kirkwood.o COBJS-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o COBJS-$(CONFIG_USB_EHCI_VCT) += ehci-vct.o diff --git a/drivers/usb/host/ehci-kirkwood.c b/drivers/usb/host/ehci-kirkwood.c new file mode 100644 index 0000000000..64997b85ce --- /dev/null +++ b/drivers/usb/host/ehci-kirkwood.c @@ -0,0 +1,108 @@ +/* + * (C) Copyright 2009 + * Marvell Semiconductor + * Written-by: Prafulla Wadaskar + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include "ehci.h" +#include "ehci-core.h" +#include + +#define rdl(off) readl(KW_USB20_BASE + (off)) +#define wrl(off, val) writel((val), KW_USB20_BASE + (off)) + +#define USB_WINDOW_CTRL(i) (0x320 + ((i) << 4)) +#define USB_WINDOW_BASE(i) (0x324 + ((i) << 4)) +#define USB_TARGET_DRAM 0x0 + +/* + * USB 2.0 Bridge Address Decoding registers setup + */ +static void usb_brg_adrdec_setup(void) +{ + int i; + u32 size, attrib; + + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { + + /* Enable DRAM bank */ + switch (i) { + case 0: + attrib = KWCPU_ATTR_DRAM_CS0; + break; + case 1: + attrib = KWCPU_ATTR_DRAM_CS1; + break; + case 2: + attrib = KWCPU_ATTR_DRAM_CS2; + break; + case 3: + attrib = KWCPU_ATTR_DRAM_CS3; + break; + default: + /* invalide bank, disable access */ + attrib = 0; + break; + } + + size = kw_sdram_bs(i); + if ((size) && (attrib)) + wrl(USB_WINDOW_CTRL(i), + KWCPU_WIN_CTRL_DATA(size, USB_TARGET_DRAM, + attrib, KWCPU_WIN_ENABLE)); + else + wrl(USB_WINDOW_CTRL(i), KWCPU_WIN_DISABLE); + + wrl(USB_WINDOW_BASE(i), kw_sdram_bar(i)); + } +} + +/* + * Create the appropriate control structures to manage + * a new EHCI host controller. + */ +int ehci_hcd_init(void) +{ + usb_brg_adrdec_setup(); + + hccr = (struct ehci_hccr *)(KW_USB20_BASE + 0x100); + hcor = (struct ehci_hcor *)((uint32_t) hccr + + HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + debug("Kirkwood-ehci: init hccr %x and hcor %x hc_length %d\n", + (uint32_t)hccr, (uint32_t)hcor, + (uint32_t)HC_LENGTH(ehci_readl(&hccr->cr_capbase))); + + return 0; +} + +/* + * Destroy the appropriate control structures corresponding + * the the EHCI host controller. + */ +int ehci_hcd_stop(void) +{ + return 0; +} + -- cgit From 50243e3e7a96a96c5418ce6c90b7252d26fdd5b0 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 7 Jul 2009 15:48:58 -0500 Subject: usb: Fix compiler warning with gcc4.4 ehci-hcd.c: In function 'ehci_submit_root': ehci-hcd.c:719: warning: value computed is not used ehci-hcd.c:748: warning: value computed is not used Signed-off-by: Kumar Gala Signed-off-by: Remy Bohmer --- drivers/usb/host/ehci-hcd.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c index bbd547b3e3..423ea5d814 100644 --- a/drivers/usb/host/ehci-hcd.c +++ b/drivers/usb/host/ehci-hcd.c @@ -716,7 +716,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, goto unknown; } /* unblock posted writes */ - ehci_readl(&hcor->or_usbcmd); + (void) ehci_readl(&hcor->or_usbcmd); break; case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8): reg = ehci_readl(status_reg); @@ -745,7 +745,7 @@ ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer, } ehci_writel(status_reg, reg); /* unblock posted write */ - ehci_readl(&hcor->or_usbcmd); + (void) ehci_readl(&hcor->or_usbcmd); break; default: debug("Unknown request\n"); -- cgit From 22ee647380c42f44528f99b7c1b423725e542102 Mon Sep 17 00:00:00 2001 From: Sedji Gaouaou Date: Thu, 9 Jul 2009 10:16:29 +0200 Subject: at91: Introduction of at91sam9g45 SOC. AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz. It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of peripherals. The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES. On the board you can find 2 USART, USB high speed, a 480*272 LG lcd, ethernet, gpio/joystick/buttons. Signed-off-by: Sedji Gaouaou --- drivers/net/macb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 6de0a04410..c1843539f9 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -447,14 +447,16 @@ static int macb_init(struct eth_device *netdev, bd_t *bd) /* choose RMII or MII mode. This depends on the board */ #ifdef CONFIG_RMII #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) macb_writel(macb, USRIO, MACB_BIT(RMII) | MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, 0); #endif #else #if defined(CONFIG_AT91CAP9) || defined(CONFIG_AT91SAM9260) || \ - defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) + defined(CONFIG_AT91SAM9263) || defined(CONFIG_AT91SAM9G20) || \ + defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) macb_writel(macb, USRIO, MACB_BIT(CLKEN)); #else macb_writel(macb, USRIO, MACB_BIT(MII)); -- cgit From b4db4a7638ef90cf0aacf7b954d9bf3043dda780 Mon Sep 17 00:00:00 2001 From: Po-Yu Chuang Date: Fri, 10 Jul 2009 18:03:57 +0800 Subject: issue write command to base for JEDEC flash For JEDEC flash, we should issue word programming command relative to base address rather than sector base address. Original source makes SST Flash fails to program sectors which are not on the 0x10000 boundaries. e.g. SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector is 0x1000 bytes. Thus, if we issue command to "sector base (0x41000) + offset(0x5555)", it sends to 0x46555 and the chip fails to recognize that address. This patch is tested with SST39LF040. Signed-off-by: Po-Yu Chuang Signed-off-by: Stefan Roese --- drivers/mtd/cfi_flash.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'drivers') diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c index d0732f53fa..81ac5d318a 100644 --- a/drivers/mtd/cfi_flash.c +++ b/drivers/mtd/cfi_flash.c @@ -835,14 +835,19 @@ static int flash_write_cfiword (flash_info_t * info, ulong dest, break; case CFI_CMDSET_AMD_EXTENDED: case CFI_CMDSET_AMD_STANDARD: -#ifdef CONFIG_FLASH_CFI_LEGACY - case CFI_CMDSET_AMD_LEGACY: -#endif sect = find_sector(info, dest); flash_unlock_seq (info, sect); flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE); sect_found = 1; break; +#ifdef CONFIG_FLASH_CFI_LEGACY + case CFI_CMDSET_AMD_LEGACY: + sect = find_sector(info, dest); + flash_unlock_seq (info, 0); + flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE); + sect_found = 1; + break; +#endif } switch (info->portwidth) { -- cgit