From 8931ab176025b03cfc320b3fd1eca432a88ed560 Mon Sep 17 00:00:00 2001 From: Ben Warren Date: Sat, 26 Jan 2008 23:41:19 -0500 Subject: Fix conditional compilation of mpx8xxx_spi driver This driver should only compile if CONFIG_MPC8XXX_SPI is set Signed-off-by: Ben Warren Signed-off-by: Kim Phillips --- drivers/spi/mpc8xxx_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/spi/mpc8xxx_spi.c b/drivers/spi/mpc8xxx_spi.c index a3d1c95515..2fe838c45d 100644 --- a/drivers/spi/mpc8xxx_spi.c +++ b/drivers/spi/mpc8xxx_spi.c @@ -22,11 +22,11 @@ */ #include +#if defined(CONFIG_MPC8XXX_SPI) && defined(CONFIG_HARD_SPI) + #include #include -#ifdef CONFIG_HARD_SPI - #define SPI_EV_NE (0x80000000 >> 22) /* Receiver Not Empty */ #define SPI_EV_NF (0x80000000 >> 23) /* Transmitter Not Full */ -- cgit From 7ec8bb15ee368ea54d48d64867767a704d9ab4c2 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Thu, 27 Dec 2007 10:56:54 +0100 Subject: OMAP5912: fix FIFO handling in UART driver According to the OMAP5912 Serial Interfaces Reference Guide (see http://focus.ti.com/lit/ug/spru760c/spru760c.pdf, page 150), the FIFO_EN enable bit in the FIFO Control Register (FCR) can only be changed when the baud clock is not running, i. e. when both DLL and DLH are set to 0. Thus make sure that DLL and DLH are 0 when writing the FCR. Signed-off-by: Wolfgang Denk --- drivers/serial/ns16550.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) (limited to 'drivers') diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 2429464d89..6b3f60eb57 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -21,11 +21,15 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif com_port->lcr = LCR_BKSE | LCRVAL; - com_port->dll = baud_divisor & 0xff; - com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->dll = 0; + com_port->dlm = 0; com_port->lcr = LCRVAL; com_port->mcr = MCRVAL; com_port->fcr = FCRVAL; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = baud_divisor & 0xff; + com_port->dlm = (baud_divisor >> 8) & 0xff; + com_port->lcr = LCRVAL; #if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -38,12 +42,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; + com_port->lcr = LCR_BKSE | LCRVAL; + com_port->dll = 0; + com_port->dlm = 0; + com_port->lcr = LCRVAL; + com_port->mcr = MCRVAL; + com_port->fcr = FCRVAL; com_port->lcr = LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; } void NS16550_putc (NS16550_t com_port, char c) -- cgit From 69018ce2e086e9caf35b914d675b82bc4888f077 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Thu, 17 Jan 2008 08:25:45 -0600 Subject: QE: Move FDT support into a common file Move the flat device tree setup for QE related devices into a common file shared between 83xx & 85xx platforms that have QE's. Signed-off-by: Kumar Gala --- drivers/qe/Makefile | 3 +- drivers/qe/fdt.c | 90 +++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/qe/qe.h | 1 + 3 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 drivers/qe/fdt.c (limited to 'drivers') diff --git a/drivers/qe/Makefile b/drivers/qe/Makefile index 4844181b8e..ec5aa738aa 100644 --- a/drivers/qe/Makefile +++ b/drivers/qe/Makefile @@ -24,7 +24,8 @@ include $(TOPDIR)/config.mk LIB := $(obj)qe.a -COBJS := qe.o uccf.o uec.o uec_phy.o +COBJS-$(CONFIG_OF_LIBFDT) += fdt.o +COBJS := qe.o uccf.o uec.o uec_phy.o $(COBJS-y) SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c new file mode 100644 index 0000000000..53074889c1 --- /dev/null +++ b/drivers/qe/fdt.c @@ -0,0 +1,90 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include "qe.h" + +DECLARE_GLOBAL_DATA_PTR; + +/* + * If a QE firmware has been uploaded, then add the 'firmware' node under + * the 'qe' node. + */ +void fdt_fixup_qe_firmware(void *blob) +{ + struct qe_firmware_info *qe_fw_info; + int node, ret; + + qe_fw_info = qe_get_firmware_info(); + if (!qe_fw_info) + return; + + node = fdt_path_offset(blob, "/qe"); + if (node < 0) + return; + + /* We assume the node doesn't exist yet */ + node = fdt_add_subnode(blob, node, "firmware"); + if (node < 0) + return; + + ret = fdt_setprop(blob, node, "extended-modes", + &qe_fw_info->extended_modes, sizeof(u64)); + if (ret < 0) + goto error; + + ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id); + if (ret < 0) + goto error; + + ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps, + sizeof(qe_fw_info->vtraps)); + if (ret < 0) + goto error; + + return; + +error: + fdt_del_node(blob, node); +} + +void ft_qe_setup(void *blob) +{ +#ifdef CONFIG_QE + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_prop_u32(blob, "device_type", "qe", 4, + "brg-frequency", gd->brg_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "clock-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "bus-frequency", gd->qe_clk, 1); + do_fixup_by_compat_u32(blob, "fsl,qe", + "brg-frequency", gd->brg_clk, 1); + fdt_fixup_qe_firmware(blob); +#endif +} diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index 4c96c67ff3..741ed7fa4a 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -289,5 +289,6 @@ int qe_set_brg(uint brg, uint rate); int qe_set_mii_clk_src(int ucc_num); int qe_upload_firmware(const struct qe_firmware *firmware); struct qe_firmware_info *qe_get_firmware_info(void); +void ft_qe_setup(void *blob); #endif /* __QE_H__ */ -- cgit