From d2ab4bbc7b709e8c4c17784a96aae25cc1196425 Mon Sep 17 00:00:00 2001 From: York Sun Date: Tue, 25 Jun 2013 11:37:39 -0700 Subject: powerpc/corenet: Move CONFIG_FSL_CORENET out of board header file Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board specific feature and belongs to SoC header. Signed-off-by: York Sun --- include/configs/B4860QDS.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs/B4860QDS.h') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 09043435b4..0f40179aca 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -33,7 +33,6 @@ #define CONFIG_E500MC /* BOOKE e500mc family */ #define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ #define CONFIG_MPC85xx /* MPC85xx/PQ3 platform */ -#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */ #define CONFIG_MP /* support multiple processors */ #ifndef CONFIG_SYS_TEXT_BASE -- cgit From cb033741f425c8290fdcfbe6da4ae69b504c52fa Mon Sep 17 00:00:00 2001 From: Shaveta Leekha Date: Tue, 2 Jul 2013 14:43:53 +0530 Subject: board/b4860qds: Add support for configuring SerDes1 Refclks 1) Add support in B4860 board files for using IDT driver where IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer that generate different refclks for SerDes modules, used this driver for reconfiguring SerDes1 Refclks(based on SerDes1 protocols) for CPRI to work. CPRI works on 122.88MHz and default refclks coming on board are not suitable for it 2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file to b4860qds board file, as SerDes1 Refclk1 would come from PHY MUX in case of certain protocols, that have been checked here. This change would make on board SGMIIs to work 3) Add I2C addresses for IDT8T49N222A devices in board/include file 4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist Signed-off-by: Shaveta Leekha Acked-by: York Sun --- include/configs/B4860QDS.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/configs/B4860QDS.h') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 0f40179aca..7bc3428f4a 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -74,6 +74,13 @@ #define VSC3308_TX_ADDRESS 0x02 #define VSC3308_RX_ADDRESS 0x03 +/* IDT clock synthesizers */ +#define CONFIG_IDT8T49N222A +#define I2C_CH_IDT 0x9 + +#define IDT_SERDES1_ADDRESS 0x6E +#define IDT_SERDES2_ADDRESS 0x6C + #define CONFIG_ENV_OVERWRITE #ifdef CONFIG_SYS_NO_FLASH -- cgit From 0795eff34c5744dcc59ead6edbbcd2cd600f58fe Mon Sep 17 00:00:00 2001 From: Minghuan Lian Date: Wed, 3 Jul 2013 18:32:41 +0800 Subject: powerpc/rman: fix RMan support for t4240 and b4860 1. Add CONFIG_SYS_DPAA_RMAN macro to t4240 and b4860. 2. Decrease RMan liodn offset number. SET_RMAN_LIODN() is used to set liodn offset of RMan blocks 0-3. For t4240 and b4860, RMan liodn base is assigned to 922, the original offset number is too large that the liodn (base+offset 922+678 = 1600) is greater than 0x500 the maximum liodn number. Signed-off-by: Minghuan Lian Signed-off-by: York Sun --- include/configs/B4860QDS.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/configs/B4860QDS.h') diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index 7bc3428f4a..2f0bc6b062 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -584,6 +584,8 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_SYS_DPAA_FMAN +#define CONFIG_SYS_DPAA_RMAN + /* Default address of microcode for the Linux Fman driver */ #if defined(CONFIG_SPIFLASH) /* -- cgit