From 1266df887781c779deaf6d05eea2ef90a470cb34 Mon Sep 17 00:00:00 2001 From: Becky Bruce Date: Mon, 3 Nov 2008 15:44:01 -0600 Subject: powerpc: change 86xx SMP boot method We put the bootpg for the secondary cpus into memory and use BPTR to get to it. This is a step towards converting to the ePAPR boot methodology. Also, the code is written to deal properly with more than 4GB of RAM. Signed-off-by: Becky Bruce --- include/configs/MPC8641HPCN.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include/configs/MPC8641HPCN.h') diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index c33047f540..1401e159a3 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -45,6 +45,12 @@ #define CONFIG_SYS_RESET_ADDRESS 0xfff00100 +/* + * virtual address to be used for temporary mappings. There + * should be 128k free at this VA. + */ +#define CONFIG_SYS_SCRATCH_VA 0xe0000000 + /* * set this to enable Rapid IO. PCI and RIO are mutually exclusive */ @@ -109,6 +115,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory*/ #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE +#define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM #define MPC86xx_DDR_SDRAM_CLK_CNTL -- cgit