From d9b94f28a442b0013caef99de084d7b72e2d4607 Mon Sep 17 00:00:00 2001 From: Jon Loeliger Date: Mon, 25 Jul 2005 14:05:07 -0500 Subject: * Patch by Jon Loeliger, 2005-05-05 Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O --- include/configs/TQM8560.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include/configs/TQM8560.h') diff --git a/include/configs/TQM8560.h b/include/configs/TQM8560.h index f418e26344..1466f31780 100644 --- a/include/configs/TQM8560.h +++ b/include/configs/TQM8560.h @@ -276,6 +276,7 @@ #define CONFIG_MII 1 /* MII PHY management */ #define CONFIG_MPC85XX_TSEC2 1 +#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1" #define TSEC2_PHY_ADDR 1 #define TSEC2_PHYIDX 0 @@ -288,7 +289,7 @@ #define CFG_CPMFCR_RAMTYPE 0 #define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) -#define CONFIG_ETHPRIME "ENET1" +#define CONFIG_ETHPRIME "TSEC1" /* * Environment -- cgit