From 84b124db3584d8b3f1a42c1506983323bce9983f Mon Sep 17 00:00:00 2001 From: Dinh Nguyen Date: Tue, 23 Apr 2019 16:55:03 -0500 Subject: dm: cache: Create a uclass for cache The cache UCLASS will be used for configure settings that can be found in a CPU's L2 cache controller. Add a uclass and a test for cache. Reviewed-by: Simon Glass Signed-off-by: Dinh Nguyen --- include/dm/uclass-id.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include/dm/uclass-id.h') diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 86e59781b0..09e0ad5391 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -34,6 +34,7 @@ enum uclass_id { UCLASS_BLK, /* Block device */ UCLASS_BOARD, /* Device information from hardware */ UCLASS_BOOTCOUNT, /* Bootcount backing store */ + UCLASS_CACHE, /* Cache controller */ UCLASS_CLK, /* Clock source, e.g. used by peripherals */ UCLASS_CPU, /* CPU, typically part of an SoC */ UCLASS_CROS_EC, /* Chrome OS EC */ -- cgit