From 8f9052fd98e2e97e33b0e5ccf57f028e595abb5d Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 30 Dec 2014 22:53:21 +0800 Subject: pci: Make pci apis usable before relocation Introduce a gd->hose to save the pci hose in the early phase so that apis in drivers/pci/pci.c can be used before relocation. Architecture codes need assign a valid gd->hose in the early phase. Some variables are declared as static so change them to be either stack variable or global data member so that they can be used before relocation, except the 'indent' used by CONFIG_PCI_SCAN_SHOW which just affects some print format. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/asm-generic/global_data.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h index 9c5a1e166f..3d14d5f117 100644 --- a/include/asm-generic/global_data.h +++ b/include/asm-generic/global_data.h @@ -90,6 +90,12 @@ typedef struct global_data { unsigned long malloc_base; /* base address of early malloc() */ unsigned long malloc_limit; /* limit address */ unsigned long malloc_ptr; /* current address */ +#endif +#ifdef CONFIG_PCI + struct pci_controller *hose; /* PCI hose for early use */ +#endif +#ifdef CONFIG_PCI_BOOTDELAY + int pcidelay_done; #endif struct udevice *cur_serial_dev; /* current serial device */ struct arch_global_data arch; /* architecture-specific data */ -- cgit From a62e84d7b1824a202dd6a9e9c7b1bc350c7b33b7 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Wed, 31 Dec 2014 16:05:11 +0800 Subject: fdt: Add several apis to decode pci device node This commit adds several APIs to decode PCI device node according to the Open Firmware PCI bus bindings, including: - fdtdec_get_pci_addr() for encoded pci address - fdtdec_get_pci_vendev() for vendor id and device id - fdtdec_get_pci_bdf() for pci device bdf triplet - fdtdec_get_pci_bar32() for pci device register bar Signed-off-by: Bin Meng Acked-by: Simon Glass Signed-off-by: Simon Glass (Include in fdtdec.h and adjust tegra to fix build error) --- include/fdtdec.h | 109 +++++++++++++++++++++++++++++++++++++++++++++++++------ 1 file changed, 98 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/fdtdec.h b/include/fdtdec.h index 5effa240af..75af750ee5 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -15,6 +15,7 @@ */ #include +#include /* * A typedef for a physical address. Note that fdt data is always big @@ -50,6 +51,49 @@ struct fdt_resource { fdt_addr_t end; }; +enum fdt_pci_space { + FDT_PCI_SPACE_CONFIG = 0, + FDT_PCI_SPACE_IO = 0x01000000, + FDT_PCI_SPACE_MEM32 = 0x02000000, + FDT_PCI_SPACE_MEM64 = 0x03000000, + FDT_PCI_SPACE_MEM32_PREF = 0x42000000, + FDT_PCI_SPACE_MEM64_PREF = 0x43000000, +}; + +#define FDT_PCI_ADDR_CELLS 3 +#define FDT_PCI_SIZE_CELLS 2 +#define FDT_PCI_REG_SIZE \ + ((FDT_PCI_ADDR_CELLS + FDT_PCI_SIZE_CELLS) * sizeof(u32)) + +/* + * The Open Firmware spec defines PCI physical address as follows: + * + * bits# 31 .... 24 23 .... 16 15 .... 08 07 .... 00 + * + * phys.hi cell: npt000ss bbbbbbbb dddddfff rrrrrrrr + * phys.mid cell: hhhhhhhh hhhhhhhh hhhhhhhh hhhhhhhh + * phys.lo cell: llllllll llllllll llllllll llllllll + * + * where: + * + * n: is 0 if the address is relocatable, 1 otherwise + * p: is 1 if addressable region is prefetchable, 0 otherwise + * t: is 1 if the address is aliased (for non-relocatable I/O) below 1MB + * (for Memory), or below 64KB (for relocatable I/O) + * ss: is the space code, denoting the address space + * bbbbbbbb: is the 8-bit Bus Number + * ddddd: is the 5-bit Device Number + * fff: is the 3-bit Function Number + * rrrrrrrr: is the 8-bit Register Number + * hhhhhhhh: is a 32-bit unsigned number + * llllllll: is a 32-bit unsigned number + */ +struct fdt_pci_addr { + u32 phys_hi; + u32 phys_mid; + u32 phys_lo; +}; + /** * Compute the size of a resource. * @@ -257,6 +301,60 @@ fdt_addr_t fdtdec_get_addr(const void *blob, int node, fdt_addr_t fdtdec_get_addr_size(const void *blob, int node, const char *prop_name, fdt_size_t *sizep); +/** + * Look at an address property in a node and return the pci address which + * corresponds to the given type in the form of fdt_pci_addr. + * The property must hold one fdt_pci_addr with a lengh. + * + * @param blob FDT blob + * @param node node to examine + * @param type pci address type (FDT_PCI_SPACE_xxx) + * @param prop_name name of property to find + * @param addr returns pci address in the form of fdt_pci_addr + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_addr(const void *blob, int node, enum fdt_pci_space type, + const char *prop_name, struct fdt_pci_addr *addr); + +/** + * Look at the compatible property of a device node that represents a PCI + * device and extract pci vendor id and device id from it. + * + * @param blob FDT blob + * @param node node to examine + * @param vendor vendor id of the pci device + * @param device device id of the pci device + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_vendev(const void *blob, int node, + u16 *vendor, u16 *device); + +/** + * Look at the pci address of a device node that represents a PCI device + * and parse the bus, device and function number from it. + * + * @param blob FDT blob + * @param node node to examine + * @param addr pci address in the form of fdt_pci_addr + * @param bdf returns bus, device, function triplet + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_bdf(const void *blob, int node, + struct fdt_pci_addr *addr, pci_dev_t *bdf); + +/** + * Look at the pci address of a device node that represents a PCI device + * and return base address of the pci device's registers. + * + * @param blob FDT blob + * @param node node to examine + * @param addr pci address in the form of fdt_pci_addr + * @param bar returns base address of the pci device's registers + * @return 0 if ok, negative on error + */ +int fdtdec_get_pci_bar32(const void *blob, int node, + struct fdt_pci_addr *addr, u32 *bar); + /** * Look up a 32-bit integer property in a node and return it. The property * must have at least 4 bytes of data. The value of the first cell is @@ -682,17 +780,6 @@ int fdt_get_named_resource(const void *fdt, int node, const char *property, const char *prop_names, const char *name, struct fdt_resource *res); -/** - * Look at the reg property of a device node that represents a PCI device - * and parse the bus, device and function number from it. - * - * @param fdt FDT blob - * @param node node to examine - * @param bdf returns bus, device, function triplet - * @return 0 if ok, negative on error - */ -int fdtdec_pci_get_bdf(const void *fdt, int node, int *bdf); - /** * Decode a named region within a memory bank of a given type. * -- cgit From 8cb20ccc34cda9fdcbae962744bf8ecee90dd5d2 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 22:14:15 +0800 Subject: x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig options so that we can remove them from board configuration file. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/chromebook_link.h | 2 -- include/configs/crownbay.h | 2 -- 2 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 8930210908..449f0c2ce3 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -19,11 +19,9 @@ #define CONFIG_SYS_CAR_SIZE (128 * 1024) #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index eadb339a0f..b927b1c9f5 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -14,10 +14,8 @@ #include #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_X86_SERIAL -- cgit From 9d74f03460a788e004fb1fb4cb53003d26f57298 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 22:14:18 +0800 Subject: x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig There are many places in the U-Boot source tree which refer to CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT that is currently defined in coreboot.h. Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch to board configuration file to build U-Boot later. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/coreboot.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 990a2d186e..a0d99522b7 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -19,7 +19,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_COREBOOT #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_EARLY_PCI_INIT @@ -55,10 +54,6 @@ "stdout=vga,serial,cbmem\0" \ "stderr=vga,serial,cbmem\0" -#define CONFIG_CBMEM_CONSOLE - -#define CONFIG_VIDEO_COREBOOT - #define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_TRACE -- cgit From 24ef04280cc9730679d390acb41bb02487527303 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 22:14:19 +0800 Subject: x86: Move CONFIG_SYS_CAR_xxx to Kconfig Move CONFIG_SYS_CAR_ADDR and CONFIG_SYS_CAR_SIZE to Kconfig so that we don't need them in the board configuration file thus the same board configuratoin file can be used to build both coreboot version and bare version. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/chromebook_link.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 449f0c2ce3..318f1a8fe7 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -15,9 +15,9 @@ #include -#define CONFIG_SYS_CAR_ADDR 0xff7e0000 -#define CONFIG_SYS_CAR_SIZE (128 * 1024) + #define CONFIG_SYS_MONITOR_LEN (1 << 20) + #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO -- cgit From fa48e51013280396f02e668a5d9f1d606d69be35 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 22:14:20 +0800 Subject: x86: Remove include/configs/coreboot.h Since we already swtiched to use the new mechanism for building U-Boot for coreboot, coreboot.h is no longer needed so remove it. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/coreboot.h | 70 ---------------------------------------------- 1 file changed, 70 deletions(-) delete mode 100644 include/configs/coreboot.h (limited to 'include') diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h deleted file mode 100644 index a0d99522b7..0000000000 --- a/include/configs/coreboot.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008 - * Graeme Russ, graeme.russ@gmail.com. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_LAST_STAGE_INIT -#define CONFIG_SYS_EARLY_PCI_INIT - -#define CONFIG_SYS_CAR_ADDR 0x19200000 -#define CONFIG_SYS_CAR_SIZE (16 * 1024) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - -#define CONFIG_TRACE_EARLY_SIZE (8 << 20) -#define CONFIG_TRACE_EARLY -#define CONFIG_TRACE_EARLY_ADDR 0x01400000 - -#define CONFIG_BOOTSTAGE -#define CONFIG_BOOTSTAGE_REPORT -#define CONFIG_BOOTSTAGE_FDT -#define CONFIG_CMD_BOOTSTAGE -/* Place to stash bootstage data from first-stage U-Boot */ -#define CONFIG_BOOTSTAGE_STASH 0x0110f000 -#define CONFIG_BOOTSTAGE_STASH_SIZE 0x7fc -#define CONFIG_BOOTSTAGE_USER_COUNT 60 - -#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} - -#define CONFIG_X86_SERIAL - -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ - "stdout=vga,serial,cbmem\0" \ - "stderr=vga,serial,cbmem\0" - -#define CONFIG_NR_DRAM_BANKS 4 - -#define CONFIG_TRACE -#define CONFIG_CMD_TRACE -#define CONFIG_TRACE_BUFFER_SIZE (16 << 20) - -#define CONFIG_BOOTDELAY 2 - -#define CONFIG_CROS_EC -#define CONFIG_CROS_EC_LPC -#define CONFIG_CMD_CROS_EC -#define CONFIG_ARCH_EARLY_INIT_R - -#endif /* __CONFIG_H */ -- cgit From ade8127a7929c6394908e7debe89e297202b7efa Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 22:14:21 +0800 Subject: x86: Make chromebook_link the default board for coreboot Change SYS_CONFIG_NAME and DEFAULT_DEVICE_TREE to chromebook_link which is currently the only real board officially supported to run U-Boot loaded by coreboot. Note the symbolic link file chromebook_link.dts is deleted and link.dts is renamed to chromebook_link.dts. To avoid multiple definition of video_hw_init, the CONFIG_VIDEO_X86 define needs to be moved to arch/x86/cpu/ivybridge/Kconfig. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/chromebook_link.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 318f1a8fe7..e0bf3096f6 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -39,7 +39,6 @@ #define CONFIG_X86_OPTION_ROM_FILE pci8086,0166.bin #define CONFIG_X86_OPTION_ROM_ADDR 0xfff90000 -#define CONFIG_VIDEO_X86 #define CONFIG_PCI_MEM_BUS 0xe0000000 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS -- cgit From 657e384af630463e3c8c4ffbacd16c5e46aeb0e0 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Tue, 6 Jan 2015 14:35:38 +0800 Subject: x86: Remove CONFIG_DISPLAY_CPUINFO in chromebook_link.h CONFIG_DISPLAY_CPUINFO is already defined in x86-common.h, so remove it to avoid duplication. Signed-off-by: Bin Meng Acked-by: Simon Glass --- include/configs/chromebook_link.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index e0bf3096f6..7e6d239d13 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -20,7 +20,6 @@ #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_DISPLAY_CPUINFO #define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 -- cgit