From c2fbcb6ae86c10621a386c13be57eaa766221ed5 Mon Sep 17 00:00:00 2001 From: Harald Krapfenbauer Date: Tue, 18 Aug 2009 04:49:57 -0400 Subject: Blackfin: cm-bf527/cm-bf537: increase flash sectors Newer revisions of these boards have slightly larger flashes, so increase the configured number of sectors so that U-Boot works on all revisions. Signed-off-by: Harald Krapfenbauer Signed-off-by: Mike Frysinger --- include/configs/cm-bf527.h | 2 +- include/configs/cm-bf537e.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/configs/cm-bf527.h b/include/configs/cm-bf527.h index 79d06fba52..159271996b 100644 --- a/include/configs/cm-bf527.h +++ b/include/configs/cm-bf527.h @@ -95,7 +95,7 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 64 +#define CONFIG_SYS_MAX_FLASH_SECT 67 /* diff --git a/include/configs/cm-bf537e.h b/include/configs/cm-bf537e.h index 021b631a90..34d429935e 100644 --- a/include/configs/cm-bf537e.h +++ b/include/configs/cm-bf537e.h @@ -79,7 +79,7 @@ #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_PROTECTION #define CONFIG_SYS_MAX_FLASH_BANKS 1 -#define CONFIG_SYS_MAX_FLASH_SECT 32 +#define CONFIG_SYS_MAX_FLASH_SECT 35 /* -- cgit From 30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075 Mon Sep 17 00:00:00 2001 From: Wolfgang Denk Date: Tue, 25 Aug 2009 12:22:38 +0200 Subject: include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declaration The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Wolfgang Denk --- include/s3c24x0.h | 22 ++++++++++++++-------- 1 file changed, 14 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/s3c24x0.h b/include/s3c24x0.h index 71f35a5174..4fa8000681 100644 --- a/include/s3c24x0.h +++ b/include/s3c24x0.h @@ -550,14 +550,20 @@ typedef struct { /* SPI (see manual chapter 22) */ typedef struct { - S3C24X0_REG32 SPCON; - S3C24X0_REG32 SPSTA; - S3C24X0_REG32 SPPIN; - S3C24X0_REG32 SPPRE; - S3C24X0_REG32 SPTDAT; - S3C24X0_REG32 SPRDAT; - S3C24X0_REG32 res[2]; -} __attribute__((__packed__)) S3C24X0_SPI_CHANNEL; + S3C24X0_REG8 SPCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 SPSTA; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 SPPIN; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 SPPRE; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 SPTDAT; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 SPRDAT; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 res7[16]; +} /*__attribute__((__packed__))*/ S3C24X0_SPI_CHANNEL; typedef struct { S3C24X0_SPI_CHANNEL ch[S3C24X0_SPI_CHANNELS]; -- cgit