/*
 * Xilinx CSE QSPI single DTS
 *
 * Copyright (C) 2015 - 2017 Xilinx, Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include "zynq-cse-qspi.dtsi"

&qspi {
	spi-rx-bus-width = <4>;
};