initial Olimex linux tree from Daniel, originally Feb 3, 2016

1 files changed, 2411 insertions, 0 deletions

diff --git a/linux/arch/arm/boot/dts/.am437x-gp-evm.dtb.dts.tmp b/linux/arch/arm/boot/dts/.am437x-gp-evm.dtb.dts.tmp
new file mode 100644
index 00000000..5dcd5d4b
--- /dev/null
+++ b/linux/arch/arm/boot/dts/.am437x-gp-evm.dtb.dts.tmp
@@ -0,0 +1,2411 @@
+# 1 "arch/arm/boot/dts/am437x-gp-evm.dts"
+# 1 "<built-in>"
+# 1 "<command-line>"
+# 1 "arch/arm/boot/dts/am437x-gp-evm.dts"
+# 11 "arch/arm/boot/dts/am437x-gp-evm.dts"
+/dts-v1/;
+
+# 1 "arch/arm/boot/dts/am4372.dtsi" 1
+# 11 "arch/arm/boot/dts/am4372.dtsi"
+# 1 "./arch/arm/boot/dts/include/dt-bindings/gpio/gpio.h" 1
+# 12 "arch/arm/boot/dts/am4372.dtsi" 2
+# 1 "./arch/arm/boot/dts/include/dt-bindings/interrupt-controller/arm-gic.h" 1
+
+
+
+
+
+
+
+# 1 "./arch/arm/boot/dts/include/dt-bindings/interrupt-controller/irq.h" 1
+# 9 "./arch/arm/boot/dts/include/dt-bindings/interrupt-controller/arm-gic.h" 2
+# 13 "arch/arm/boot/dts/am4372.dtsi" 2
+
+# 1 "arch/arm/boot/dts/skeleton.dtsi" 1
+
+
+
+
+
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ chosen { };
+ aliases { };
+ memory { device_type = "memory"; reg = <0 0>; };
+};
+# 15 "arch/arm/boot/dts/am4372.dtsi" 2
+
+/ {
+ compatible = "ti,am4372", "ti,am43";
+ interrupt-parent = <&wakeupgen>;
+
+
+ aliases {
+  i2c0 = &i2c0;
+  i2c1 = &i2c1;
+  i2c2 = &i2c2;
+  serial0 = &uart0;
+  serial1 = &uart1;
+  serial2 = &uart2;
+  serial3 = &uart3;
+  serial4 = &uart4;
+  serial5 = &uart5;
+  ethernet0 = &cpsw_emac0;
+  ethernet1 = &cpsw_emac1;
+ };
+
+ cpus {
+  #address-cells = <1>;
+  #size-cells = <0>;
+  cpu: cpu@0 {
+   compatible = "arm,cortex-a9";
+   device_type = "cpu";
+   reg = <0>;
+
+   clocks = <&dpll_mpu_ck>;
+   clock-names = "cpu";
+
+
+
+
+
+
+   voltage-tolerance = <2>;
+
+   clock-latency = <300000>;
+  };
+ };
+
+ soc {
+  compatible = "ti,omap-infra";
+  mpu {
+   compatible = "ti,omap4-mpu";
+   ti,hwmods = "mpu";
+   sram = <&ocmcram>;
+  };
+ };
+
+ gic: interrupt-controller@48241000 {
+  compatible = "arm,cortex-a9-gic";
+  interrupt-controller;
+  #interrupt-cells = <3>;
+  reg = <0x48241000 0x1000>,
+        <0x48240100 0x0100>;
+  interrupt-parent = <&gic>;
+ };
+
+ wakeupgen: interrupt-controller@48281000 {
+  compatible = "ti,omap4-wugen-mpu";
+  interrupt-controller;
+  #interrupt-cells = <3>;
+  reg = <0x48281000 0x1000>;
+  interrupt-parent = <&gic>;
+ };
+
+ l2-cache-controller@48242000 {
+  compatible = "arm,pl310-cache";
+  reg = <0x48242000 0x1000>;
+  cache-unified;
+  cache-level = <2>;
+ };
+
+ ocp {
+  compatible = "ti,am4372-l3-noc", "simple-bus";
+  #address-cells = <1>;
+  #size-cells = <1>;
+  ranges;
+  ti,hwmods = "l3_main";
+  ti,no-idle;
+  reg = <0x44000000 0x400000
+         0x44800000 0x400000>;
+  interrupts = <0 9 4>,
+        <0 10 4>;
+
+  l4_wkup: l4_wkup@44c00000 {
+   compatible = "ti,am4-l4-wkup", "simple-bus";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges = <0 0x44c00000 0x287000>;
+
+   wkup_m3: wkup_m3@100000 {
+    compatible = "ti,am4372-wkup-m3";
+    reg = <0x100000 0x4000>,
+          <0x180000 0x2000>;
+    reg-names = "umem", "dmem";
+    ti,hwmods = "wkup_m3";
+    ti,pm-firmware = "am335x-pm-firmware.elf";
+   };
+
+   prcm: prcm@1f0000 {
+    compatible = "ti,am4-prcm";
+    reg = <0x1f0000 0x11000>;
+    interrupts = <0 11 4>;
+
+    prcm_clocks: clocks {
+     #address-cells = <1>;
+     #size-cells = <0>;
+    };
+
+    prcm_clockdomains: clockdomains {
+    };
+   };
+
+   scm: scm@210000 {
+    compatible = "ti,am4-scm", "simple-bus";
+    reg = <0x210000 0x4000>;
+    #address-cells = <1>;
+    #size-cells = <1>;
+    ranges = <0 0x210000 0x4000>;
+
+    am43xx_pinmux: pinmux@800 {
+     compatible = "ti,am437-padconf",
+           "pinctrl-single";
+     reg = <0x800 0x31c>;
+     #address-cells = <1>;
+     #size-cells = <0>;
+     #interrupt-cells = <1>;
+     interrupt-controller;
+     pinctrl-single,register-width = <32>;
+     pinctrl-single,function-mask = <0xffffffff>;
+    };
+
+    scm_conf: scm_conf@0 {
+     compatible = "syscon";
+     reg = <0x0 0x800>;
+     #address-cells = <1>;
+     #size-cells = <1>;
+
+     scm_clocks: clocks {
+      #address-cells = <1>;
+      #size-cells = <0>;
+     };
+    };
+
+    wkup_m3_ipc: wkup_m3_ipc@1324 {
+     compatible = "ti,am4372-wkup-m3-ipc";
+     reg = <0x1324 0x44>;
+     interrupts = <0 78 4>;
+     ti,rproc = <&wkup_m3>;
+     mboxes = <&mailbox &mbox_wkupm3>;
+    };
+
+    edma_xbar: dma-router@f90 {
+     compatible = "ti,am335x-edma-crossbar";
+     reg = <0xf90 0x40>;
+     #dma-cells = <3>;
+     dma-requests = <64>;
+     dma-masters = <&edma>;
+    };
+
+    scm_clockdomains: clockdomains {
+    };
+   };
+  };
+
+  emif: emif@4c000000 {
+   compatible = "ti,emif-am4372";
+   reg = <0x4c000000 0x1000000>;
+   ti,hwmods = "emif";
+   ti,no-idle;
+   sram = <&ocmcram>;
+  };
+
+  edma: edma@49000000 {
+   compatible = "ti,edma3-tpcc";
+   ti,hwmods = "tpcc";
+   reg = <0x49000000 0x10000>;
+   reg-names = "edma3_cc";
+   interrupts = <0 12 4>,
+         <0 13 4>,
+         <0 14 4>;
+   interrupt-names = "edma3_ccint", "emda3_mperr",
+       "edma3_ccerrint";
+   dma-requests = <64>;
+   #dma-cells = <2>;
+
+   ti,tptcs = <&edma_tptc0 7>, <&edma_tptc1 5>,
+       <&edma_tptc2 0>;
+
+   ti,edma-memcpy-channels = <32 33>;
+  };
+
+  edma_tptc0: tptc@49800000 {
+   compatible = "ti,edma3-tptc";
+   ti,hwmods = "tptc0";
+   reg = <0x49800000 0x100000>;
+   interrupts = <0 112 4>;
+   interrupt-names = "edma3_tcerrint";
+  };
+
+  edma_tptc1: tptc@49900000 {
+   compatible = "ti,edma3-tptc";
+   ti,hwmods = "tptc1";
+   reg = <0x49900000 0x100000>;
+   interrupts = <0 113 4>;
+   interrupt-names = "edma3_tcerrint";
+  };
+
+  edma_tptc2: tptc@49a00000 {
+   compatible = "ti,edma3-tptc";
+   ti,hwmods = "tptc2";
+   reg = <0x49a00000 0x100000>;
+   interrupts = <0 114 4>;
+   interrupt-names = "edma3_tcerrint";
+  };
+
+  uart0: serial@44e09000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x44e09000 0x2000>;
+   interrupts = <0 72 4>;
+   ti,hwmods = "uart1";
+  };
+
+  uart1: serial@48022000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x48022000 0x2000>;
+   interrupts = <0 73 4>;
+   ti,hwmods = "uart2";
+   status = "disabled";
+  };
+
+  uart2: serial@48024000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x48024000 0x2000>;
+   interrupts = <0 74 4>;
+   ti,hwmods = "uart3";
+   status = "disabled";
+  };
+
+  uart3: serial@481a6000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x481a6000 0x2000>;
+   interrupts = <0 44 4>;
+   ti,hwmods = "uart4";
+   status = "disabled";
+  };
+
+  uart4: serial@481a8000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x481a8000 0x2000>;
+   interrupts = <0 45 4>;
+   ti,hwmods = "uart5";
+   status = "disabled";
+  };
+
+  uart5: serial@481aa000 {
+   compatible = "ti,am4372-uart","ti,omap2-uart";
+   reg = <0x481aa000 0x2000>;
+   interrupts = <0 46 4>;
+   ti,hwmods = "uart6";
+   status = "disabled";
+  };
+
+  mailbox: mailbox@480C8000 {
+   compatible = "ti,omap4-mailbox";
+   reg = <0x480C8000 0x200>;
+   interrupts = <0 77 4>;
+   ti,hwmods = "mailbox";
+   #mbox-cells = <1>;
+   ti,mbox-num-users = <4>;
+   ti,mbox-num-fifos = <8>;
+   mbox_wkupm3: wkup_m3 {
+    ti,mbox-send-noirq;
+    ti,mbox-tx = <0 0 0>;
+    ti,mbox-rx = <0 0 3>;
+   };
+   mbox_pru1_0: mbox_pru1_0 {
+    ti,mbox-tx = <2 0 0>;
+    ti,mbox-rx = <3 0 0>;
+   };
+   mbox_pru1_1: mbox_pru1_1 {
+    ti,mbox-tx = <4 0 0>;
+    ti,mbox-rx = <5 0 0>;
+   };
+  };
+
+  timer1: timer@44e31000 {
+   compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
+   reg = <0x44e31000 0x400>;
+   interrupts = <0 67 4>;
+   ti,timer-alwon;
+   ti,hwmods = "timer1";
+  };
+
+  timer2: timer@48040000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48040000 0x400>;
+   interrupts = <0 68 4>;
+   ti,hwmods = "timer2";
+  };
+
+  timer3: timer@48042000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48042000 0x400>;
+   interrupts = <0 69 4>;
+   ti,hwmods = "timer3";
+   status = "disabled";
+  };
+
+  timer4: timer@48044000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48044000 0x400>;
+   interrupts = <0 92 4>;
+   ti,timer-pwm;
+   ti,hwmods = "timer4";
+   status = "disabled";
+  };
+
+  timer5: timer@48046000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48046000 0x400>;
+   interrupts = <0 93 4>;
+   ti,timer-pwm;
+   ti,hwmods = "timer5";
+   status = "disabled";
+  };
+
+  timer6: timer@48048000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48048000 0x400>;
+   interrupts = <0 94 4>;
+   ti,timer-pwm;
+   ti,hwmods = "timer6";
+   status = "disabled";
+  };
+
+  timer7: timer@4804a000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x4804a000 0x400>;
+   interrupts = <0 95 4>;
+   ti,timer-pwm;
+   ti,hwmods = "timer7";
+   status = "disabled";
+  };
+
+  timer8: timer@481c1000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x481c1000 0x400>;
+   interrupts = <0 131 4>;
+   ti,hwmods = "timer8";
+   status = "disabled";
+  };
+
+  timer9: timer@4833d000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x4833d000 0x400>;
+   interrupts = <0 132 4>;
+   ti,hwmods = "timer9";
+   status = "disabled";
+  };
+
+  timer10: timer@4833f000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x4833f000 0x400>;
+   interrupts = <0 133 4>;
+   ti,hwmods = "timer10";
+   status = "disabled";
+  };
+
+  timer11: timer@48341000 {
+   compatible = "ti,am4372-timer","ti,am335x-timer";
+   reg = <0x48341000 0x400>;
+   interrupts = <0 134 4>;
+   ti,hwmods = "timer11";
+   status = "disabled";
+  };
+
+  counter32k: counter@44e86000 {
+   compatible = "ti,am4372-counter32k","ti,omap-counter32k";
+   reg = <0x44e86000 0x40>;
+   ti,hwmods = "counter_32k";
+  };
+
+  rtc: rtc@44e3e000 {
+   compatible = "ti,am4372-rtc", "ti,am3352-rtc", "ti,da830-rtc";
+   reg = <0x44e3e000 0x1000>;
+   interrupts = <0 75 4
+          0 76 4>;
+   ti,hwmods = "rtc";
+   system-power-controller;
+   status = "disabled";
+  };
+
+  wdt: wdt@44e35000 {
+   compatible = "ti,am4372-wdt","ti,omap3-wdt";
+   reg = <0x44e35000 0x1000>;
+   interrupts = <0 91 4>;
+   ti,hwmods = "wd_timer2";
+  };
+
+  gpio0: gpio@44e07000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x44e07000 0x1000>;
+   interrupts = <0 96 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio1";
+   status = "disabled";
+  };
+
+  gpio1: gpio@4804c000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x4804c000 0x1000>;
+   interrupts = <0 98 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio2";
+   status = "disabled";
+  };
+
+  gpio2: gpio@481ac000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x481ac000 0x1000>;
+   interrupts = <0 32 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio3";
+   status = "disabled";
+  };
+
+  gpio3: gpio@481ae000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x481ae000 0x1000>;
+   interrupts = <0 62 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio4";
+   status = "disabled";
+  };
+
+  gpio4: gpio@48320000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x48320000 0x1000>;
+   interrupts = <0 106 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio5";
+   status = "disabled";
+  };
+
+  gpio5: gpio@48322000 {
+   compatible = "ti,am4372-gpio","ti,omap4-gpio";
+   reg = <0x48322000 0x1000>;
+   interrupts = <0 148 4>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   ti,hwmods = "gpio6";
+   status = "disabled";
+  };
+
+  hwspinlock: spinlock@480ca000 {
+   compatible = "ti,omap4-hwspinlock";
+   reg = <0x480ca000 0x1000>;
+   ti,hwmods = "spinlock";
+   #hwlock-cells = <1>;
+  };
+
+  i2c0: i2c@44e0b000 {
+   compatible = "ti,am4372-i2c","ti,omap4-i2c";
+   reg = <0x44e0b000 0x1000>;
+   interrupts = <0 70 4>;
+   ti,hwmods = "i2c1";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  i2c1: i2c@4802a000 {
+   compatible = "ti,am4372-i2c","ti,omap4-i2c";
+   reg = <0x4802a000 0x1000>;
+   interrupts = <0 71 4>;
+   ti,hwmods = "i2c2";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  i2c2: i2c@4819c000 {
+   compatible = "ti,am4372-i2c","ti,omap4-i2c";
+   reg = <0x4819c000 0x1000>;
+   interrupts = <0 30 4>;
+   ti,hwmods = "i2c3";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  spi0: spi@48030000 {
+   compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
+   reg = <0x48030000 0x400>;
+   interrupts = <0 65 4>;
+   ti,hwmods = "spi0";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  mmc1: mmc@48060000 {
+   compatible = "ti,omap4-hsmmc";
+   reg = <0x48060000 0x1000>;
+   ti,hwmods = "mmc1";
+   ti,dual-volt;
+   ti,needs-special-reset;
+   dmas = <&edma 24 0>,
+    <&edma 25 0>;
+   dma-names = "tx", "rx";
+   interrupts = <0 64 4>;
+   status = "disabled";
+  };
+
+  mmc2: mmc@481d8000 {
+   compatible = "ti,omap4-hsmmc";
+   reg = <0x481d8000 0x1000>;
+   ti,hwmods = "mmc2";
+   ti,needs-special-reset;
+   dmas = <&edma 2 0>,
+    <&edma 3 0>;
+   dma-names = "tx", "rx";
+   interrupts = <0 28 4>;
+   status = "disabled";
+  };
+
+  mmc3: mmc@47810000 {
+   compatible = "ti,omap4-hsmmc";
+   reg = <0x47810000 0x1000>;
+   ti,hwmods = "mmc3";
+   ti,needs-special-reset;
+   interrupts = <0 29 4>;
+   status = "disabled";
+  };
+
+  spi1: spi@481a0000 {
+   compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
+   reg = <0x481a0000 0x400>;
+   interrupts = <0 125 4>;
+   ti,hwmods = "spi1";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  spi2: spi@481a2000 {
+   compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
+   reg = <0x481a2000 0x400>;
+   interrupts = <0 126 4>;
+   ti,hwmods = "spi2";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  spi3: spi@481a4000 {
+   compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
+   reg = <0x481a4000 0x400>;
+   interrupts = <0 136 4>;
+   ti,hwmods = "spi3";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  spi4: spi@48345000 {
+   compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
+   reg = <0x48345000 0x400>;
+   interrupts = <0 137 4>;
+   ti,hwmods = "spi4";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   status = "disabled";
+  };
+
+  mac: ethernet@4a100000 {
+   compatible = "ti,am4372-cpsw","ti,cpsw";
+   reg = <0x4a100000 0x800
+          0x4a101200 0x100>;
+   interrupts = <0 40 4
+          0 41 4
+          0 42 4
+          0 43 4>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ti,hwmods = "cpgmac0";
+   clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
+   clock-names = "fck", "cpts";
+   status = "disabled";
+   cpdma_channels = <8>;
+   ale_entries = <1024>;
+   bd_ram_size = <0x2000>;
+   no_bd_ram = <0>;
+   rx_descs = <64>;
+   mac_control = <0x20>;
+   slaves = <2>;
+   active_slave = <0>;
+   cpts_clock_mult = <0x80000000>;
+   cpts_clock_shift = <29>;
+   ranges;
+
+   davinci_mdio: mdio@4a101000 {
+    compatible = "ti,am4372-mdio","ti,davinci_mdio";
+    reg = <0x4a101000 0x100>;
+    #address-cells = <1>;
+    #size-cells = <0>;
+    ti,hwmods = "davinci_mdio";
+    bus_freq = <1000000>;
+    status = "disabled";
+   };
+
+   cpsw_emac0: slave@4a100200 {
+
+    mac-address = [ 00 00 00 00 00 00 ];
+   };
+
+   cpsw_emac1: slave@4a100300 {
+
+    mac-address = [ 00 00 00 00 00 00 ];
+   };
+
+   phy_sel: cpsw-phy-sel@44e10650 {
+    compatible = "ti,am43xx-cpsw-phy-sel";
+    reg= <0x44e10650 0x4>;
+    reg-names = "gmii-sel";
+   };
+  };
+
+  epwmss0: epwmss@48300000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x48300000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss0";
+   status = "disabled";
+
+   ecap0: ecap@48300100 {
+    compatible = "ti,am4372-ecap","ti,am33xx-ecap";
+    #pwm-cells = <3>;
+    reg = <0x48300100 0x80>;
+    ti,hwmods = "ecap0";
+    status = "disabled";
+   };
+
+   ehrpwm0: ehrpwm@48300200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x48300200 0x80>;
+    ti,hwmods = "ehrpwm0";
+    status = "disabled";
+   };
+  };
+
+  epwmss1: epwmss@48302000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x48302000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss1";
+   status = "disabled";
+
+   ecap1: ecap@48302100 {
+    compatible = "ti,am4372-ecap","ti,am33xx-ecap";
+    #pwm-cells = <3>;
+    reg = <0x48302100 0x80>;
+    ti,hwmods = "ecap1";
+    status = "disabled";
+   };
+
+   ehrpwm1: ehrpwm@48302200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x48302200 0x80>;
+    ti,hwmods = "ehrpwm1";
+    status = "disabled";
+   };
+  };
+
+  epwmss2: epwmss@48304000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x48304000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss2";
+   status = "disabled";
+
+   ecap2: ecap@48304100 {
+    compatible = "ti,am4372-ecap","ti,am33xx-ecap";
+    #pwm-cells = <3>;
+    reg = <0x48304100 0x80>;
+    ti,hwmods = "ecap2";
+    status = "disabled";
+   };
+
+   ehrpwm2: ehrpwm@48304200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x48304200 0x80>;
+    ti,hwmods = "ehrpwm2";
+    status = "disabled";
+   };
+  };
+
+  epwmss3: epwmss@48306000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x48306000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss3";
+   status = "disabled";
+
+   ehrpwm3: ehrpwm@48306200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x48306200 0x80>;
+    ti,hwmods = "ehrpwm3";
+    status = "disabled";
+   };
+  };
+
+  epwmss4: epwmss@48308000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x48308000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss4";
+   status = "disabled";
+
+   ehrpwm4: ehrpwm@48308200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x48308200 0x80>;
+    ti,hwmods = "ehrpwm4";
+    status = "disabled";
+   };
+  };
+
+  epwmss5: epwmss@4830a000 {
+   compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
+   reg = <0x4830a000 0x10>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "epwmss5";
+   status = "disabled";
+
+   ehrpwm5: ehrpwm@4830a200 {
+    compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
+    #pwm-cells = <3>;
+    reg = <0x4830a200 0x80>;
+    ti,hwmods = "ehrpwm5";
+    status = "disabled";
+   };
+  };
+
+  tscadc: tscadc@44e0d000 {
+   compatible = "ti,am3359-tscadc";
+   reg = <0x44e0d000 0x1000>;
+   ti,hwmods = "adc_tsc";
+   interrupts = <0 16 4>;
+   clocks = <&adc_tsc_fck>;
+   clock-names = "fck";
+   status = "disabled";
+
+   tsc {
+    compatible = "ti,am3359-tsc";
+   };
+
+   adc {
+    #io-channel-cells = <1>;
+    compatible = "ti,am3359-adc";
+   };
+
+  };
+
+  sham: sham@53100000 {
+   compatible = "ti,omap5-sham";
+   ti,hwmods = "sham";
+   reg = <0x53100000 0x300>;
+   dmas = <&edma 36 0>;
+   dma-names = "rx";
+   interrupts = <0 109 4>;
+  };
+
+  aes: aes@53501000 {
+   compatible = "ti,omap4-aes";
+   ti,hwmods = "aes";
+   reg = <0x53501000 0xa0>;
+   interrupts = <0 103 4>;
+   dmas = <&edma 6 0>,
+    <&edma 5 0>;
+   dma-names = "tx", "rx";
+  };
+
+  des: des@53701000 {
+   compatible = "ti,omap4-des";
+   ti,hwmods = "des";
+   reg = <0x53701000 0xa0>;
+   interrupts = <0 130 4>;
+   dmas = <&edma 34 0>,
+    <&edma 33 0>;
+   dma-names = "tx", "rx";
+  };
+
+
+
+
+
+
+
+  sgx: sgx@0x56000000 {
+   compatible = "ti,am4376-sgx530", "img,sgx530";
+   ti,hwmods = "gfx";
+   reg = <0x56000000 0x1000000>;
+   interrupts = <0 37 4>;
+   status = "disabled";
+  };
+
+  rng: rng@48310000 {
+   compatible = "ti,omap4-rng";
+   ti,hwmods = "rng";
+   reg = <0x48310000 0x2000>;
+   interrupts = <0 111 4>;
+  };
+
+  pruss1: pruss@54400000 {
+   compatible = "ti,am4372-pruss";
+   ti,hwmods = "pruss";
+   reg = <0x54400000 0x2000>,
+         <0x54402000 0x2000>,
+         <0x54410000 0x8000>,
+         <0x54420000 0x2000>,
+         <0x54426000 0x2000>;
+   reg-names = "dram0", "dram1", "shrdram2", "intc", "cfg";
+   interrupts = <0 20 4
+          0 21 4
+          0 22 4
+          0 23 4
+          0 24 4
+          0 26 4
+          0 27 4>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   pru1_0: pru@54434000 {
+    compatible = "ti,am4372-pru-rproc";
+    reg = <0x54434000 0x3000>,
+          <0x54422000 0x400>,
+          <0x54422400 0x100>;
+    reg-names = "iram", "control", "debug";
+    mboxes = <&mailbox &mbox_pru1_0>;
+   };
+
+   pru1_1: pru@54438000 {
+    compatible = "ti,am4372-pru-rproc";
+    reg = <0x54438000 0x3000>,
+          <0x54424000 0x400>,
+          <0x54424400 0x100>;
+    reg-names = "iram", "control", "debug";
+    mboxes = <&mailbox &mbox_pru1_1>;
+   };
+  };
+
+  mcasp0: mcasp@48038000 {
+   compatible = "ti,am33xx-mcasp-audio";
+   ti,hwmods = "mcasp0";
+   reg = <0x48038000 0x2000>,
+         <0x46000000 0x400000>;
+   reg-names = "mpu", "dat";
+   interrupts = <80>, <81>;
+   interrupt-names = "tx", "rx";
+   status = "disabled";
+   dmas = <&edma 8 2>,
+          <&edma 9 2>;
+   dma-names = "tx", "rx";
+  };
+
+  mcasp1: mcasp@4803C000 {
+   compatible = "ti,am33xx-mcasp-audio";
+   ti,hwmods = "mcasp1";
+   reg = <0x4803C000 0x2000>,
+         <0x46400000 0x400000>;
+   reg-names = "mpu", "dat";
+   interrupts = <82>, <83>;
+   interrupt-names = "tx", "rx";
+   status = "disabled";
+   dmas = <&edma 10 2>,
+          <&edma 11 2>;
+   dma-names = "tx", "rx";
+  };
+
+  elm: elm@48080000 {
+   compatible = "ti,am3352-elm";
+   reg = <0x48080000 0x2000>;
+   interrupts = <0 4 4>;
+   ti,hwmods = "elm";
+   clocks = <&l4ls_gclk>;
+   clock-names = "fck";
+   status = "disabled";
+  };
+
+  gpmc: gpmc@50000000 {
+   compatible = "ti,am3352-gpmc";
+   ti,hwmods = "gpmc";
+   dmas = <&edma 52>;
+   dma-names = "rxtx";
+   clocks = <&l3s_gclk>;
+   clock-names = "fck";
+   reg = <0x50000000 0x2000>;
+   interrupts = <0 100 4>;
+   gpmc,num-cs = <7>;
+   gpmc,num-waitpins = <2>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   gpio-controller;
+   #gpio-cells = <2>;
+   interrupt-controller;
+   #interrupt-cells = <2>;
+   status = "disabled";
+  };
+
+  ocp2scp0: ocp2scp@483a8000 {
+   compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "ocp2scp0";
+
+   usb2_phy1: phy@483a8000 {
+    compatible = "ti,am437x-usb2";
+    reg = <0x483a8000 0x8000>;
+    syscon-phy-power = <&scm_conf 0x620>;
+    clocks = <&usb_phy0_always_on_clk32k>,
+      <&usb_otg_ss0_refclk960m>;
+    clock-names = "wkupclk", "refclk";
+    #phy-cells = <0>;
+    status = "disabled";
+   };
+  };
+
+  ocp2scp1: ocp2scp@483e8000 {
+   compatible = "ti,am437x-ocp2scp", "ti,omap-ocp2scp";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+   ti,hwmods = "ocp2scp1";
+
+   usb2_phy2: phy@483e8000 {
+    compatible = "ti,am437x-usb2";
+    reg = <0x483e8000 0x8000>;
+    syscon-phy-power = <&scm_conf 0x628>;
+    clocks = <&usb_phy1_always_on_clk32k>,
+      <&usb_otg_ss1_refclk960m>;
+    clock-names = "wkupclk", "refclk";
+    #phy-cells = <0>;
+    status = "disabled";
+   };
+  };
+
+  dwc3_1: omap_dwc3@48380000 {
+   compatible = "ti,am437x-dwc3";
+   ti,hwmods = "usb_otg_ss0";
+   reg = <0x48380000 0x10000>;
+   interrupts = <0 172 4>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   utmi-mode = <1>;
+   ranges;
+
+   usb1: usb@48390000 {
+    compatible = "synopsys,dwc3";
+    reg = <0x48390000 0x10000>;
+    interrupts = <0 168 4>,
+          <0 168 4>,
+          <0 172 4>;
+    interrupt-names = "peripheral",
+        "host",
+        "otg";
+    phys = <&usb2_phy1>;
+    phy-names = "usb2-phy";
+    maximum-speed = "high-speed";
+    dr_mode = "otg";
+    status = "disabled";
+    snps,dis_u3_susphy_quirk;
+    snps,dis_u2_susphy_quirk;
+   };
+  };
+
+  dwc3_2: omap_dwc3@483c0000 {
+   compatible = "ti,am437x-dwc3";
+   ti,hwmods = "usb_otg_ss1";
+   reg = <0x483c0000 0x10000>;
+   interrupts = <0 178 4>;
+   #address-cells = <1>;
+   #size-cells = <1>;
+   utmi-mode = <1>;
+   ranges;
+
+   usb2: usb@483d0000 {
+    compatible = "synopsys,dwc3";
+    reg = <0x483d0000 0x10000>;
+    interrupts = <0 174 4>,
+          <0 174 4>,
+          <0 178 4>;
+    interrupt-names = "peripheral",
+        "host",
+        "otg";
+    phys = <&usb2_phy2>;
+    phy-names = "usb2-phy";
+    maximum-speed = "high-speed";
+    dr_mode = "otg";
+    status = "disabled";
+    snps,dis_u3_susphy_quirk;
+    snps,dis_u2_susphy_quirk;
+   };
+  };
+
+  qspi: qspi@47900000 {
+   compatible = "ti,am4372-qspi";
+   reg = <0x47900000 0x100>,
+         <0x30000000 0x3ffffff>;
+   reg-names = "qspi_base", "qspi_mmap";
+   #address-cells = <1>;
+   #size-cells = <0>;
+   ti,hwmods = "qspi";
+   interrupts = <0 138 0x4>;
+   num-cs = <4>;
+   status = "disabled";
+  };
+
+  hdq: hdq@48347000 {
+   compatible = "ti,am4372-hdq";
+   reg = <0x48347000 0x1000>;
+   interrupts = <0 139 4>;
+   clocks = <&func_12m_clk>;
+   clock-names = "fck";
+   ti,hwmods = "hdq1w";
+   status = "disabled";
+  };
+
+  dss: dss@4832a000 {
+   compatible = "ti,omap3-dss";
+   reg = <0x4832a000 0x200>;
+   status = "disabled";
+   ti,hwmods = "dss_core";
+   clocks = <&disp_clk>;
+   clock-names = "fck";
+   #address-cells = <1>;
+   #size-cells = <1>;
+   ranges;
+
+   dispc: dispc@4832a400 {
+    compatible = "ti,omap3-dispc";
+    reg = <0x4832a400 0x400>;
+    interrupts = <0 127 4>;
+    ti,hwmods = "dss_dispc";
+    clocks = <&disp_clk>;
+    clock-names = "fck";
+   };
+
+   rfbi: rfbi@4832a800 {
+    compatible = "ti,omap3-rfbi";
+    reg = <0x4832a800 0x100>;
+    ti,hwmods = "dss_rfbi";
+    clocks = <&disp_clk>;
+    clock-names = "fck";
+    status = "disabled";
+   };
+  };
+
+  ocmcram: ocmcram@40300000 {
+   compatible = "mmio-sram";
+   reg = <0x40300000 0x40000>;
+   map-exec;
+  };
+
+  dcan0: can@481cc000 {
+   compatible = "ti,am4372-d_can", "ti,am3352-d_can";
+   ti,hwmods = "d_can0";
+   clocks = <&dcan0_fck>;
+   clock-names = "fck";
+   reg = <0x481cc000 0x2000>;
+   syscon-raminit = <&scm_conf 0x644 0>;
+   interrupts = <0 52 4>;
+   status = "disabled";
+  };
+
+  dcan1: can@481d0000 {
+   compatible = "ti,am4372-d_can", "ti,am3352-d_can";
+   ti,hwmods = "d_can1";
+   clocks = <&dcan1_fck>;
+   clock-names = "fck";
+   reg = <0x481d0000 0x2000>;
+   syscon-raminit = <&scm_conf 0x644 1>;
+   interrupts = <0 49 4>;
+   status = "disabled";
+  };
+
+  vpfe0: vpfe@48326000 {
+   compatible = "ti,am437x-vpfe";
+   reg = <0x48326000 0x2000>;
+   interrupts = <0 48 4>;
+   ti,hwmods = "vpfe0";
+   status = "disabled";
+  };
+
+  vpfe1: vpfe@48328000 {
+   compatible = "ti,am437x-vpfe";
+   reg = <0x48328000 0x2000>;
+   interrupts = <0 50 4>;
+   ti,hwmods = "vpfe1";
+   status = "disabled";
+  };
+ };
+};
+
+/include/ "am43xx-clocks.dtsi"
+# 14 "arch/arm/boot/dts/am437x-gp-evm.dts" 2
+# 1 "./arch/arm/boot/dts/include/dt-bindings/pinctrl/am43xx.h" 1
+# 15 "arch/arm/boot/dts/am437x-gp-evm.dts" 2
+# 1 "./arch/arm/boot/dts/include/dt-bindings/pwm/pwm.h" 1
+# 16 "arch/arm/boot/dts/am437x-gp-evm.dts" 2
+
+
+/ {
+ model = "TI AM437x GP EVM";
+ compatible = "ti,am437x-gp-evm","ti,am4372","ti,am43";
+
+ aliases {
+  display0 = &lcd0;
+ };
+
+ evm_v3_3d: fixedregulator-v3_3d {
+  compatible = "regulator-fixed";
+  regulator-name = "evm_v3_3d";
+  regulator-min-microvolt = <3300000>;
+  regulator-max-microvolt = <3300000>;
+  enable-active-high;
+ };
+
+ vtt_fixed: fixedregulator-vtt {
+  compatible = "regulator-fixed";
+  regulator-name = "vtt_fixed";
+  regulator-min-microvolt = <1500000>;
+  regulator-max-microvolt = <1500000>;
+  regulator-always-on;
+  regulator-boot-on;
+  enable-active-high;
+  gpio = <&gpio5 7 0>;
+ };
+
+ vmmcwl_fixed: fixedregulator-mmcwl {
+  compatible = "regulator-fixed";
+  regulator-name = "vmmcwl_fixed";
+  regulator-min-microvolt = <1800000>;
+  regulator-max-microvolt = <1800000>;
+  gpio = <&gpio1 20 0>;
+  enable-active-high;
+ };
+
+ lcd_bl: backlight {
+  compatible = "pwm-backlight";
+  pwms = <&ecap0 0 50000 (1 << 0)>;
+  brightness-levels = <0 51 53 56 62 75 101 152 255>;
+  default-brightness-level = <8>;
+ };
+
+ matrix_keypad: matrix_keypad@0 {
+  compatible = "gpio-matrix-keypad";
+  debounce-delay-ms = <5>;
+  col-scan-delay-us = <2>;
+
+  pinctrl-names = "default", "sleep";
+  pinctrl-0 = <&matrix_keypad_default>;
+  pinctrl-1 = <&matrix_keypad_sleep>;
+
+  linux,wakeup;
+
+  row-gpios = <&gpio0 3 0
+    &gpio4 3 0
+    &gpio4 2 0>;
+
+  col-gpios = <&gpio3 19 0
+    &gpio3 20 0>;
+
+  linux,keymap = <0x00000201
+    0x00010202
+    0x01000067
+    0x0101006a
+    0x02000069
+    0x0201006c>;
+  };
+
+ lcd0: display {
+  compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
+  label = "lcd";
+
+  panel-timing {
+   clock-frequency = <33000000>;
+   hactive = <800>;
+   vactive = <480>;
+   hfront-porch = <210>;
+   hback-porch = <16>;
+   hsync-len = <30>;
+   vback-porch = <10>;
+   vfront-porch = <22>;
+   vsync-len = <13>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+   de-active = <1>;
+   pixelclk-active = <1>;
+  };
+
+  port {
+   lcd_in: endpoint {
+    remote-endpoint = <&dpi_out>;
+   };
+  };
+ };
+
+ sound0: sound@0 {
+  compatible = "simple-audio-card";
+  simple-audio-card,name = "AM437x-GP-EVM";
+  simple-audio-card,widgets =
+   "Headphone", "Headphone Jack",
+   "Line", "Line In";
+  simple-audio-card,routing =
+   "Headphone Jack", "HPLOUT",
+   "Headphone Jack", "HPROUT",
+   "LINE1L", "Line In",
+   "LINE1R", "Line In";
+  simple-audio-card,format = "dsp_b";
+  simple-audio-card,bitclock-master = <&sound0_master>;
+  simple-audio-card,frame-master = <&sound0_master>;
+  simple-audio-card,bitclock-inversion;
+
+  simple-audio-card,cpu {
+   sound-dai = <&mcasp1>;
+   system-clock-frequency = <12000000>;
+  };
+
+  sound0_master: simple-audio-card,codec {
+   sound-dai = <&tlv320aic3106>;
+   system-clock-frequency = <12000000>;
+  };
+ };
+
+ audio_mstrclk: mclk_osc {
+  compatible = "fixed-clock";
+  #clock-cells = <0>;
+  clock-frequency = <12000000>;
+ };
+
+};
+
+&am43xx_pinmux {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&ddr3_vtt_toggle_default &wlan_pins_default &debugss_pins &unused_pins>;
+ pinctrl-1 = <&wlan_pins_sleep>;
+
+ ddr3_vtt_toggle_default: ddr_vtt_toggle_default {
+  pinctrl-single,pins = <
+   0x25C ((1 << 27) | ((1 << 17)) | (1 << 24) | 7)
+  >;
+ };
+
+ i2c0_pins: i2c0_pins {
+  pinctrl-single,pins = <
+   0x188 (((1 << 18) | (1 << 17)) | 0 | 0)
+   0x18c (((1 << 18) | (1 << 17)) | 0 | 0)
+  >;
+ };
+
+ i2c1_pins_default: i2c1_pins_default {
+  pinctrl-single,pins = <
+   0x15c (((1 << 18) | (1 << 17)) | 0 | 2)
+   0x158 (((1 << 18) | (1 << 17)) | 0 | 2)
+  >;
+ };
+
+ i2c1_pins_sleep: i2c1_pins_sleep {
+  pinctrl-single,pins = <
+   0x15c (((1 << 18) | (1 << 17)) | 7)
+   0x158 (((1 << 18) | (1 << 17)) | 7)
+  >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+  pinctrl-single,pins = <
+   0x100 (((1 << 18) | (1 << 17)) | 0)
+   0x104 (((1 << 18) | (1 << 17)) | 0)
+   0x0f0 (((1 << 18) | (1 << 17)) | 0)
+   0x0f4 (((1 << 18) | (1 << 17)) | 0)
+   0x0f8 (((1 << 18) | (1 << 17)) | 0)
+   0x0fc (((1 << 18) | (1 << 17)) | 0)
+   0x160 (((1 << 18) | (1 << 16)) | 7)
+  >;
+ };
+
+ mmc1_sleep_pins: pinmux_mmc1_sleep_pins {
+  pinctrl-single,pins = <
+   0x100 (((1 << 18)) | 7)
+   0x104 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x0f0 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x0f4 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x0f8 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x0fc (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x160 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+  >;
+ };
+
+ emmc_pins_default: emmc_pins_default {
+  pinctrl-single,pins = <
+   0x00 (((1 << 18) | (1 << 17)) | 1)
+   0x04 (((1 << 18) | (1 << 17)) | 1)
+   0x08 (((1 << 18) | (1 << 17)) | 1)
+   0x0c (((1 << 18) | (1 << 17)) | 1)
+   0x10 (((1 << 18) | (1 << 17)) | 1)
+   0x14 (((1 << 18) | (1 << 17)) | 1)
+   0x18 (((1 << 18) | (1 << 17)) | 1)
+   0x1c (((1 << 18) | (1 << 17)) | 1)
+   0x80 (((1 << 18) | (1 << 17)) | 2)
+   0x84 (((1 << 18) | (1 << 17)) | 2)
+  >;
+ };
+
+ emmc_pins_sleep: emmc_pins_sleep {
+  pinctrl-single,pins = <
+   0x00 (((1 << 18)) | 7)
+   0x04 (((1 << 18)) | 7)
+   0x08 (((1 << 18)) | 7)
+   0x0c (((1 << 18)) | 7)
+   0x10 (((1 << 18)) | 7)
+   0x14 (((1 << 18)) | 7)
+   0x18 (((1 << 18)) | 7)
+   0x1c (((1 << 18)) | 7)
+   0x80 (((1 << 18)) | 7)
+   0x84 (((1 << 18)) | 7)
+  >;
+ };
+
+ ecap0_pins_default: backlight_pins_default {
+  pinctrl-single,pins = <
+   0x164 0
+  >;
+ };
+
+ ecap0_pins_sleep: backlight_pins_sleep {
+  pinctrl-single,pins = <
+   0x164 (((1 << 18)) | 7)
+  >;
+ };
+
+ pixcir_ts_pins_default: pixcir_ts_pins_default {
+  pinctrl-single,pins = <
+   0x264 (((1 << 18) | (1 << 17)) | 7)
+  >;
+ };
+
+ pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
+  pinctrl-single,pins = <
+   0x264 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+  >;
+ };
+
+ cpsw_default: cpsw_default {
+  pinctrl-single,pins = <
+
+   0x114 (0 | 2)
+   0x118 (((1 << 18)) | 2)
+   0x11c (0 | 2)
+   0x120 (0 | 2)
+   0x124 (0 | 2)
+   0x128 (0 | 2)
+   0x12c (0 | 2)
+   0x130 (((1 << 18)) | 2)
+   0x134 (((1 << 18)) | 2)
+   0x138 (((1 << 18)) | 2)
+   0x13c (((1 << 18)) | 2)
+   0x140 (((1 << 18)) | 2)
+  >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+  pinctrl-single,pins = <
+
+   0x114 (((1 << 18)) | 7)
+   0x118 (((1 << 18)) | 7)
+   0x11c (((1 << 18)) | 7)
+   0x120 (((1 << 18)) | 7)
+   0x124 (((1 << 18)) | 7)
+   0x128 (((1 << 18)) | 7)
+   0x12c (((1 << 18)) | 7)
+   0x130 (((1 << 18)) | 7)
+   0x134 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x138 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x13c (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x140 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+  >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+  pinctrl-single,pins = <
+
+   0x148 (((1 << 18) | (1 << 17)) | 0 | 0)
+   0x14c (((1 << 17)) | 0)
+  >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+  pinctrl-single,pins = <
+
+   0x148 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x14c (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+  >;
+ };
+
+ nand_flash_x8_default: nand_flash_x8_default {
+  pinctrl-single,pins = <
+   0x0 (((1 << 18) | (1 << 16)) | 0)
+   0x4 (((1 << 18) | (1 << 16)) | 0)
+   0x8 (((1 << 18) | (1 << 16)) | 0)
+   0xc (((1 << 18) | (1 << 16)) | 0)
+   0x10 (((1 << 18) | (1 << 16)) | 0)
+   0x14 (((1 << 18) | (1 << 16)) | 0)
+   0x18 (((1 << 18) | (1 << 16)) | 0)
+   0x1c (((1 << 18) | (1 << 16)) | 0)
+   0x70 (((1 << 18) | (1 << 17)) | 0)
+   0x74 (((1 << 17)) | 7)
+   0x7c (((1 << 16)) | 0)
+   0x90 (((1 << 16)) | 0)
+   0x94 (((1 << 16)) | 0)
+   0x98 (((1 << 16)) | 0)
+   0x9c (((1 << 16)) | 0)
+  >;
+ };
+
+ nand_flash_x8_sleep: nand_flash_x8_sleep {
+  pinctrl-single,pins = <
+   0x0 (((1 << 18)) | 7)
+   0x4 (((1 << 18)) | 7)
+   0x8 (((1 << 18)) | 7)
+   0xc (((1 << 18)) | 7)
+   0x10 (((1 << 18)) | 7)
+   0x14 (((1 << 18)) | 7)
+   0x18 (((1 << 18)) | 7)
+   0x1c (((1 << 18)) | 7)
+   0x70 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x74 (((1 << 18)) | 7)
+   0x7c (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x90 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x94 (((1 << 18)) | 7)
+   0x98 (((1 << 18)) | 7)
+   0x9c (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+  >;
+ };
+
+ dss_pinctrl_default: dss_pinctrl_default {
+  pinctrl-single,pins = <
+   0x020 (((1 << 17)) | 1)
+   0x024 (((1 << 17)) | 1)
+   0x028 (((1 << 17)) | 1)
+   0x02c (((1 << 17)) | 1)
+   0x030 (((1 << 17)) | 1)
+   0x034 (((1 << 17)) | 1)
+   0x038 (((1 << 17)) | 1)
+   0x03c (((1 << 17)) | 1)
+   0x0a0 (((1 << 17)) | 0)
+   0x0a4 (((1 << 17)) | 0)
+   0x0a8 (((1 << 17)) | 0)
+   0x0ac (((1 << 17)) | 0)
+   0x0b0 (((1 << 17)) | 0)
+   0x0b4 (((1 << 17)) | 0)
+   0x0b8 (((1 << 17)) | 0)
+   0x0bc (((1 << 17)) | 0)
+   0x0c0 (((1 << 17)) | 0)
+   0x0c4 (((1 << 17)) | 0)
+   0x0c8 (((1 << 17)) | 0)
+   0x0cc (((1 << 17)) | 0)
+   0x0d0 (((1 << 17)) | 0)
+   0x0d4 (((1 << 17)) | 0)
+   0x0d8 (((1 << 17)) | 0)
+   0x0dc (((1 << 17)) | 0)
+   0x0e0 (((1 << 17)) | 0)
+   0x0e4 (((1 << 17)) | 0)
+   0x0e8 (((1 << 17)) | 0)
+   0x0ec (((1 << 17)) | 0)
+
+  >;
+ };
+
+ dss_pinctrl_sleep: dss_pinctrl_sleep {
+  pinctrl-single,pins = <
+   0x020 ((1 << 27) | ((1 << 18)) | 7)
+   0x024 ((1 << 27) | ((1 << 18)) | 7)
+   0x028 ((1 << 27) | ((1 << 18)) | 7)
+   0x02C ((1 << 27) | ((1 << 18)) | 7)
+   0x030 ((1 << 27) | ((1 << 18)) | 7)
+   0x034 ((1 << 27) | ((1 << 18)) | 7)
+   0x038 ((1 << 27) | ((1 << 18)) | 7)
+   0x03C ((1 << 27) | ((1 << 18)) | 7)
+   0x0A0 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0A4 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0A8 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0AC ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0B0 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0B4 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0B8 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0BC ((1 << 27) | ((1 << 18)) | 7)
+   0x0C0 ((1 << 27) | ((1 << 18)) | 7)
+   0x0C4 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0C8 ((1 << 27) | ((1 << 18)) | 7)
+   0x0CC ((1 << 27) | ((1 << 18)) | 7)
+   0x0D0 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0D4 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0D8 ((1 << 27) | (1 << 18) | (1 << 16) | 7)
+   0x0DC ((1 << 27) | ((1 << 18)) | 7)
+   0x0E0 ((1 << 27) | ((1 << 18)) | 7)
+   0x0E4 ((1 << 27) | ((1 << 18)) | 7)
+   0x0E8 ((1 << 27) | ((1 << 18)) | 7)
+   0x0EC ((1 << 27) | ((1 << 18)) | 7)
+  >;
+ };
+
+ display_mux_pins: display_mux_pins {
+  pinctrl-single,pins = <
+
+   0x238 (((1 << 17)) | 7)
+  >;
+ };
+
+ dcan0_default: dcan0_default_pins {
+  pinctrl-single,pins = <
+   0x178 (((1 << 16)) | 2)
+   0x17c (((1 << 18) | (1 << 17)) | 2)
+  >;
+ };
+
+ dcan0_sleep: dcan0_sleep_pins {
+  pinctrl-single,pins = <
+   0x178 (((1 << 18) | (1 << 17)) | 7)
+   0x17c (((1 << 18) | (1 << 17)) | 7)
+  >;
+ };
+
+ dcan1_default: dcan1_default_pins {
+  pinctrl-single,pins = <
+   0x180 (((1 << 16)) | 2)
+   0x184 (((1 << 18) | (1 << 17)) | 2)
+  >;
+ };
+
+ dcan1_sleep: dcan1_sleep_pins {
+  pinctrl-single,pins = <
+   0x180 (((1 << 18) | (1 << 17)) | 7)
+   0x184 (((1 << 18) | (1 << 17)) | 7)
+  >;
+ };
+
+ vpfe0_pins_default: vpfe0_pins_default {
+  pinctrl-single,pins = <
+   0x1B0 (((1 << 18) | (1 << 17)) | 0)
+   0x1B4 (((1 << 18) | (1 << 17)) | 0)
+   0x1C0 (((1 << 18) | (1 << 17)) | 0)
+   0x1C4 (((1 << 18) | (1 << 17)) | 0)
+   0x1C8 (((1 << 18) | (1 << 17)) | 0)
+   0x208 (((1 << 18) | (1 << 17)) | 0)
+   0x20C (((1 << 18) | (1 << 17)) | 0)
+   0x210 (((1 << 18) | (1 << 17)) | 0)
+   0x214 (((1 << 18) | (1 << 17)) | 0)
+   0x218 (((1 << 18) | (1 << 17)) | 0)
+   0x21C (((1 << 18) | (1 << 17)) | 0)
+   0x220 (((1 << 18) | (1 << 17)) | 0)
+   0x224 (((1 << 18) | (1 << 17)) | 0)
+  >;
+ };
+
+ vpfe0_pins_sleep: vpfe0_pins_sleep {
+  pinctrl-single,pins = <
+   0x1B0 ((1 << 27) | (1 << 18) | 7)
+   0x1B4 ((1 << 27) | (1 << 18) | 7)
+   0x1C0 ((1 << 27) | (1 << 18) | 7)
+   0x1C4 ((1 << 27) | (1 << 18) | 7)
+   0x1C8 ((1 << 27) | (1 << 18) | 7)
+   0x208 ((1 << 27) | (1 << 18) | 7)
+   0x20C ((1 << 27) | (1 << 18) | 7)
+   0x210 ((1 << 27) | (1 << 18) | 7)
+   0x214 ((1 << 27) | (1 << 18) | 7)
+   0x218 ((1 << 27) | (1 << 18) | 7)
+   0x21C ((1 << 27) | (1 << 18) | 7)
+   0x220 ((1 << 27) | (1 << 18) | 7)
+   0x224 ((1 << 27) | (1 << 18) | 7)
+  >;
+ };
+
+ vpfe1_pins_default: vpfe1_pins_default {
+  pinctrl-single,pins = <
+   0x1CC (((1 << 18) | (1 << 17)) | 0)
+   0x1D0 (((1 << 18) | (1 << 17)) | 0)
+   0x1D4 (((1 << 18) | (1 << 17)) | 0)
+   0x1D8 (((1 << 18) | (1 << 17)) | 0)
+   0x1DC (((1 << 18) | (1 << 17)) | 0)
+   0x1E8 (((1 << 18) | (1 << 17)) | 0)
+   0x1EC (((1 << 18) | (1 << 17)) | 0)
+   0x1F0 (((1 << 18) | (1 << 17)) | 0)
+   0x1F4 (((1 << 18) | (1 << 17)) | 0)
+   0x1F8 (((1 << 18) | (1 << 17)) | 0)
+   0x1FC (((1 << 18) | (1 << 17)) | 0)
+   0x200 (((1 << 18) | (1 << 17)) | 0)
+   0x204 (((1 << 18) | (1 << 17)) | 0)
+  >;
+ };
+
+ vpfe1_pins_sleep: vpfe1_pins_sleep {
+  pinctrl-single,pins = <
+   0x1CC ((1 << 27) | (1 << 18) | 7)
+   0x1D0 ((1 << 27) | (1 << 18) | 7)
+   0x1D4 ((1 << 27) | (1 << 18) | 7)
+   0x1D8 ((1 << 27) | (1 << 18) | 7)
+   0x1DC ((1 << 27) | (1 << 18) | 7)
+   0x1E8 ((1 << 27) | (1 << 18) | 7)
+   0x1EC ((1 << 27) | (1 << 18) | 7)
+   0x1F0 ((1 << 27) | (1 << 18) | 7)
+   0x1F4 ((1 << 27) | (1 << 18) | 7)
+   0x1F8 ((1 << 27) | (1 << 18) | 7)
+   0x1FC ((1 << 27) | (1 << 18) | 7)
+   0x200 ((1 << 27) | (1 << 18) | 7)
+   0x204 ((1 << 27) | (1 << 18) | 7)
+  >;
+ };
+
+ mcasp1_pins: mcasp1_pins {
+  pinctrl-single,pins = <
+   0x108 (0 | 4)
+   0x10c (((1 << 18)) | 4)
+   0x110 (((1 << 18)) | 4)
+   0x144 (((1 << 18)) | 4)
+  >;
+ };
+
+ mcasp1_sleep_pins: mcasp1_sleep_pins {
+  pinctrl-single,pins = <
+   0x108 (((1 << 18)) | 7)
+   0x10c (((1 << 18)) | 7)
+   0x110 (((1 << 18)) | 7)
+   0x144 (((1 << 18)) | 7)
+  >;
+ };
+
+ matrix_keypad_default: matrix_keypad_default {
+  pinctrl-single,pins = <
+   0x1a4 (((1 << 16)) | 7)
+   0x1a8 (((1 << 16)) | 7)
+   0x1ac (((1 << 18) | (1 << 16)) | (1 << 16) | 9)
+   0x154 (((1 << 18)) | 0)
+  >;
+ };
+
+ matrix_keypad_sleep: matrix_keypad_sleep {
+  pinctrl-single,pins = <
+   0x1a4 ((1 << 17) | 7)
+   0x1a8 ((1 << 17) | 7)
+   0x1ac (((1 << 18) | (1 << 16)) | (1 << 16) | 9)
+   0x154 (((1 << 18)) | 0)
+  >;
+ };
+
+ uart0_pins_default: uart0_pins_default {
+  pinctrl-single,pins = <
+   0x168 ((1 << 27) | (1 << 18) | 0)
+   0x16C ((1 << 27) | (1 << 18) | 0)
+   0x170 (((1 << 18) | (1 << 17)) | 0 | (1 << 27) | 0)
+   0x174 (((1 << 18) | (1 << 16)) | (1 << 16) | 0 | (1 << 27) | 0)
+  >;
+ };
+
+ gpio0_pins: gpio0_pins {
+  pinctrl-single,pins = <
+   0x26c (((1 << 16)) | 9)
+  >;
+ };
+
+ uart0_pins_sleep: uart0_pins_sleep {
+  pinctrl-single,pins = <
+   0x168 ((1 << 27) | (1 << 18) | 7)
+   0x16C ((1 << 27) | (1 << 18) | 7)
+   0x170 (((1 << 18) | (1 << 17)) | 0 | (1 << 27) | 0)
+   0x174 (((1 << 18)) | 0 | (1 << 27) | 0)
+  >;
+ };
+
+ mmc3_pins_default: pinmux_mmc3_pins_default {
+  pinctrl-single,pins = <
+   0x8c (((1 << 18) | (1 << 17)) | 3)
+   0x88 (((1 << 18) | (1 << 17)) | 3)
+   0x44 (((1 << 18) | (1 << 17)) | 3)
+   0x48 (((1 << 18) | (1 << 17)) | 3)
+   0x4c (((1 << 18) | (1 << 17)) | 3)
+   0x78 (((1 << 18) | (1 << 17)) | 3)
+  >;
+ };
+
+ mmc3_pins_sleep: pinmux_mmc3_pins_sleep {
+  pinctrl-single,pins = <
+   0x8c (((1 << 18)) | 7)
+   0x88 (((1 << 18)) | 7)
+   0x44 (((1 << 18)) | 7)
+   0x48 (((1 << 18)) | 7)
+   0x4c (((1 << 18)) | 7)
+   0x78 (((1 << 18)) | 7)
+  >;
+ };
+
+ wlan_pins_default: pinmux_wlan_pins_default {
+  pinctrl-single,pins = <
+   0x50 (0 | 7)
+   0x5c (((1 << 18) | (1 << 16)) | (1 << 29) | 7)
+   0x40 (0 | 7)
+  >;
+ };
+
+ wlan_pins_sleep: pinmux_wlan_pins_sleep {
+  pinctrl-single,pins = <
+   0x50 (0 | 7)
+   0x5c (((1 << 18) | (1 << 16)) | (1 << 29) | 7)
+   0x40 (((1 << 17)) | 7)
+  >;
+ };
+
+ uart3_pins: uart3_pins {
+  pinctrl-single,pins = <
+   0x228 (((1 << 18) | (1 << 16)) | 0)
+   0x22c (0 | 0)
+   0x230 (((1 << 18) | (1 << 17)) | 0)
+   0x234 (0 | 0)
+  >;
+ };
+
+ debugss_pins: pinmux_debugss_pins {
+  pinctrl-single,pins = <
+   0x290 (((1 << 18)))
+   0x294 (((1 << 18)))
+   0x298 (((1 << 18)))
+   0x29C (((1 << 18)))
+   0x2A0 (((1 << 18)))
+   0x2A4 (((1 << 18)))
+   0x2A8 (((1 << 18)))
+  >;
+ };
+
+ unused_pins: unused_pins {
+  pinctrl-single,pins = <
+   0x54 (((1 << 18)) | 7)
+   0x58 (((1 << 18)) | 7)
+   0x60 (((1 << 18)) | 7)
+   0x64 (((1 << 18)) | 7)
+   0x68 (((1 << 18)) | 7)
+   0x6C (((1 << 18)) | 7)
+   0x80 (((1 << 18)) | 7)
+   0x84 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x150 (((1 << 18)) | 7)
+   0x190 (((1 << 18)) | 7)
+   0x194 (((1 << 18)) | 7)
+   0x198 (((1 << 18)) | 7)
+   0x19C (((1 << 18)) | 7)
+   0x1A0 (((1 << 18)) | 7)
+   0x23C (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x240 (((1 << 18)) | 7)
+   0x244 (((1 << 18)) | 7)
+   0x248 (((1 << 18)) | 7)
+   0x24C (((1 << 18)) | 7)
+   0x250 (((1 << 18)) | 7)
+   0x254 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x258 (((1 << 18)) | 7)
+   0x260 (((1 << 18) | (1 << 16)) | (1 << 16) | 7)
+   0x268 (((1 << 18)) | 7)
+   0x270 (((1 << 18)) | 7)
+   0x278 (((1 << 18)) | 7)
+   0x27C (((1 << 18) | (1 << 16)) | (1 << 16))
+   0x2C8 (((1 << 18)))
+   0x2D4 (((1 << 18)))
+   0x2D8 (((1 << 18)) | 7)
+   0x2DC (((1 << 18)) | 7)
+   0x2E0 (((1 << 18)) | 7)
+   0x2E4 (((1 << 18)) | 7)
+   0x2E8 (((1 << 18)) | 7)
+   0x2EC (((1 << 18)) | 7)
+   0x2F0 (((1 << 18)) | 7)
+   0x2F4 (((1 << 18)) | 7)
+   0x2F8 (((1 << 18)) | 7)
+   0x2FC (((1 << 18)) | 7)
+   0x300 (((1 << 18)) | 7)
+   0x304 (((1 << 18)) | 7)
+   0x308 (((1 << 18)) | 7)
+   0x30C (((1 << 18)) | 7)
+   0x310 (((1 << 18)) | 7)
+   0x314 (((1 << 18)) | 7)
+   0x318 (((1 << 18)) | 7)
+  >;
+ };
+
+ usb1_pins_default: usb1_pins_default {
+  pinctrl-single,pins = <
+   0x2c0 ((1 << 27) | ((1 << 18)) | 0)
+  >;
+ };
+
+ usb1_pins_sleep: usb1_pins_sleep {
+  pinctrl-single,pins = <
+   0x2c0 ((1 << 27) | ((1 << 18)) | 7)
+  >;
+ };
+
+ usb2_pins_default: usb2_pins_default {
+  pinctrl-single,pins = <
+   0x2c4 ((1 << 27) | ((1 << 18)) | 0)
+  >;
+ };
+
+ usb2_pins_sleep: usb2_pins_sleep {
+  pinctrl-single,pins = <
+   0x2c4 ((1 << 27) | ((1 << 18)) | 7)
+  >;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+ clock-frequency = <100000>;
+
+ tps65218: tps65218@24 {
+  reg = <0x24>;
+  compatible = "ti,tps65218";
+  interrupts = <0 7 0>;
+  interrupt-controller;
+  #interrupt-cells = <2>;
+
+  dcdc1: regulator-dcdc1 {
+   compatible = "ti,tps65218-dcdc1";
+   regulator-name = "vdd_core";
+   regulator-min-microvolt = <912000>;
+   regulator-max-microvolt = <1144000>;
+   regulator-boot-on;
+   regulator-always-on;
+  };
+
+  dcdc2: regulator-dcdc2 {
+   compatible = "ti,tps65218-dcdc2";
+   regulator-name = "vdd_mpu";
+   regulator-min-microvolt = <912000>;
+   regulator-max-microvolt = <1378000>;
+   regulator-boot-on;
+   regulator-always-on;
+  };
+
+  dcdc3: regulator-dcdc3 {
+   compatible = "ti,tps65218-dcdc3";
+   regulator-name = "vdcdc3";
+   regulator-min-microvolt = <1500000>;
+   regulator-max-microvolt = <1500000>;
+   regulator-boot-on;
+   regulator-always-on;
+   regulator-state-mem {
+    regulator-on-in-suspend;
+   };
+   regulator-state-disk {
+    regulator-off-in-suspend;
+   };
+  };
+
+  dcdc5: regulator-dcdc5 {
+   compatible = "ti,tps65218-dcdc5";
+   regulator-name = "v1_0bat";
+   regulator-min-microvolt = <1000000>;
+   regulator-max-microvolt = <1000000>;
+   regulator-boot-on;
+   regulator-always-on;
+   regulator-state-mem {
+    regulator-on-in-suspend;
+   };
+  };
+
+  dcdc6: regulator-dcdc6 {
+   compatible = "ti,tps65218-dcdc6";
+   regulator-name = "v1_8bat";
+   regulator-min-microvolt = <1800000>;
+   regulator-max-microvolt = <1800000>;
+   regulator-boot-on;
+   regulator-always-on;
+   regulator-state-mem {
+    regulator-on-in-suspend;
+   };
+  };
+
+  ldo1: regulator-ldo1 {
+   compatible = "ti,tps65218-ldo1";
+   regulator-min-microvolt = <1800000>;
+   regulator-max-microvolt = <1800000>;
+   regulator-boot-on;
+   regulator-always-on;
+  };
+ };
+
+        ov2659@30 {
+  compatible = "ovti,ov2659";
+  reg = <0x30>;
+
+  clocks = <&audio_mstrclk>;
+  clock-names = "xvclk";
+
+  port {
+   ov2659_0: endpoint {
+    remote-endpoint = <&vpfe1_ep>;
+    link-frequencies = /bits/ 64 <70000000>;
+   };
+  };
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&i2c1_pins_default>;
+ pinctrl-1 = <&i2c1_pins_sleep>;
+ pixcir_ts@5c {
+  compatible = "pixcir,pixcir_tangoc";
+  pinctrl-names = "default", "sleep";
+  pinctrl-0 = <&pixcir_ts_pins_default>;
+  pinctrl-1 = <&pixcir_ts_pins_sleep>;
+  reg = <0x5c>;
+  interrupt-parent = <&gpio3>;
+  interrupts = <22 0>;
+
+  attb-gpio = <&gpio3 22 0>;
+
+  interrupts-extended = <&gpio3 22 0>,
+          <&am43xx_pinmux 0x264>;
+
+  touchscreen-size-x = <1024>;
+  touchscreen-size-y = <600>;
+ };
+
+ tlv320aic3106: tlv320aic3106@1b {
+  #sound-dai-cells = <0>;
+  compatible = "ti,tlv320aic3106";
+  reg = <0x1b>;
+  status = "okay";
+
+
+  IOVDD-supply = <&evm_v3_3d>;
+  AVDD-supply = <&evm_v3_3d>;
+  DRVDD-supply = <&evm_v3_3d>;
+  DVDD-supply = <&ldo1>;
+ };
+
+ ov2659@30 {
+  compatible = "ovti,ov2659";
+  reg = <0x30>;
+
+  clocks = <&audio_mstrclk>;
+  clock-names = "xvclk";
+
+  port {
+   ov2659_1: endpoint {
+    remote-endpoint = <&vpfe0_ep>;
+    link-frequencies = /bits/ 64 <70000000>;
+   };
+  };
+ };
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&tscadc {
+ status = "okay";
+
+ adc {
+  ti,adc-channels = <0 1 2 3 4 5 6 7>;
+ };
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&ecap0_pins_default>;
+ pinctrl-1 = <&ecap0_pins_sleep>;
+};
+
+&gpio0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio0_pins>;
+ status = "okay";
+
+ p23 {
+  gpio-hog;
+  gpios = <23 0>;
+
+
+
+
+
+
+
+  output-low;
+  line-name = "SelEMMCorNAND";
+ };
+};
+
+&gpio1 {
+ status = "okay";
+};
+
+&gpio3 {
+ status = "okay";
+};
+
+&gpio4 {
+ status = "okay";
+};
+
+&gpio5 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&display_mux_pins>;
+ status = "okay";
+ ti,no-reset-on-init;
+
+ p8 {
+
+
+
+
+
+  gpio-hog;
+  gpios = <8 0>;
+  output-high;
+  line-name = "SelLCDorHDMI";
+ };
+};
+
+&mmc1 {
+ status = "okay";
+ vmmc-supply = <&evm_v3_3d>;
+ bus-width = <4>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mmc1_pins>;
+ pinctrl-1 = <&mmc1_sleep_pins>;
+ cd-gpios = <&gpio0 6 0>;
+};
+
+&mmc3 {
+ status = "okay";
+
+
+ dmas = <&edma 30
+  &edma 31>;
+ dma-names = "tx", "rx";
+ vmmc-supply = <&vmmcwl_fixed>;
+ bus-width = <4>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mmc3_pins_default>;
+ pinctrl-1 = <&mmc3_pins_sleep>;
+ cap-power-off-card;
+ keep-power-in-suspend;
+ ti,non-removable;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ wlcore: wlcore@0 {
+  compatible = "ti,wl1835";
+  reg = <2>;
+  interrupt-parent = <&gpio1>;
+  interrupts = <23 4>;
+ };
+};
+
+&edma {
+ ti,edma-xbar-event-map = /bits/ 16 <1 30
+         2 31>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart3_pins>;
+};
+
+
+&mmc2 {
+
+
+
+
+ status = "disabled";
+ vmmc-supply = <&evm_v3_3d>;
+ bus-width = <8>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&emmc_pins_default>;
+ pinctrl-1 = <&emmc_pins_sleep>;
+ ti,non-removable;
+};
+
+&usb2_phy1 {
+ status = "okay";
+};
+
+&usb1 {
+ dr_mode = "otg";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usb1_pins_default>;
+ pinctrl-1 = <&usb1_pins_sleep>;
+};
+
+&usb2_phy2 {
+ status = "okay";
+};
+
+&usb2 {
+ dr_mode = "host";
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&usb2_pins_default>;
+ pinctrl-1 = <&usb2_pins_sleep>;
+};
+
+&mac {
+ slaves = <1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+};
+
+&cpsw_emac0 {
+ phy_id = <&davinci_mdio>, <0>;
+ phy-mode = "rgmii";
+};
+
+&elm {
+ status = "okay";
+};
+
+&gpmc {
+
+
+
+
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&nand_flash_x8_default>;
+ pinctrl-1 = <&nand_flash_x8_sleep>;
+ ranges = <0 0 0x08000000 0x01000000>;
+ nand@0,0 {
+  compatible = "ti,omap2-nand";
+  reg = <0 0 4>;
+  interrupt-parent = <&gic>;
+  interrupts = <0 100 4>;
+  ready-gpio = <&gpmc 0 0>;
+  ti,nand-ecc-opt = "bch16";
+  ti,elm-id = <&elm>;
+  nand-bus-width = <8>;
+  gpmc,device-width = <1>;
+  gpmc,sync-clk-ps = <0>;
+  gpmc,cs-on-ns = <0>;
+  gpmc,cs-rd-off-ns = <40>;
+  gpmc,cs-wr-off-ns = <40>;
+  gpmc,adv-on-ns = <0>;
+  gpmc,adv-rd-off-ns = <25>;
+  gpmc,adv-wr-off-ns = <25>;
+  gpmc,we-on-ns = <0>;
+  gpmc,we-off-ns = <20>;
+  gpmc,oe-on-ns = <3>;
+  gpmc,oe-off-ns = <30>;
+  gpmc,access-ns = <30>;
+  gpmc,rd-cycle-ns = <40>;
+  gpmc,wr-cycle-ns = <40>;
+  gpmc,bus-turnaround-ns = <0>;
+  gpmc,cycle2cycle-delay-ns = <0>;
+  gpmc,clk-activation-ns = <0>;
+  gpmc,wr-access-ns = <40>;
+  gpmc,wr-data-mux-bus-ns = <0>;
+
+
+
+
+  #address-cells = <1>;
+  #size-cells = <1>;
+  partition@0 {
+   label = "NAND.SPL";
+   reg = <0x00000000 0x00040000>;
+  };
+  partition@1 {
+   label = "NAND.SPL.backup1";
+   reg = <0x00040000 0x00040000>;
+  };
+  partition@2 {
+   label = "NAND.SPL.backup2";
+   reg = <0x00080000 0x00040000>;
+  };
+  partition@3 {
+   label = "NAND.SPL.backup3";
+   reg = <0x000c0000 0x00040000>;
+  };
+  partition@4 {
+   label = "NAND.u-boot-spl-os";
+   reg = <0x00100000 0x00080000>;
+  };
+  partition@5 {
+   label = "NAND.u-boot";
+   reg = <0x00180000 0x00100000>;
+  };
+  partition@6 {
+   label = "NAND.u-boot-env";
+   reg = <0x00280000 0x00040000>;
+  };
+  partition@7 {
+   label = "NAND.u-boot-env.backup1";
+   reg = <0x002c0000 0x00040000>;
+  };
+  partition@8 {
+   label = "NAND.kernel";
+   reg = <0x00300000 0x00700000>;
+  };
+  partition@9 {
+   label = "NAND.file-system";
+   reg = <0x00a00000 0x1f600000>;
+  };
+ };
+};
+
+&uart0 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&uart0_pins_default>;
+ pinctrl-1 = <&uart0_pins_sleep>;
+};
+
+&dss {
+ status = "ok";
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&dss_pinctrl_default>;
+ pinctrl-1 = <&dss_pinctrl_sleep>;
+
+ port {
+  dpi_out: endpoint@0 {
+   remote-endpoint = <&lcd_in>;
+   data-lines = <24>;
+  };
+ };
+};
+
+&dcan0 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&dcan0_default>;
+ pinctrl-1 = <&dcan0_sleep>;
+ status = "okay";
+};
+
+&dcan1 {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&dcan1_default>;
+ pinctrl-1 = <&dcan1_sleep>;
+ status = "okay";
+};
+
+&vpfe0 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&vpfe0_pins_default>;
+ pinctrl-1 = <&vpfe0_pins_sleep>;
+
+ port {
+  vpfe0_ep: endpoint {
+   remote-endpoint = <&ov2659_1>;
+   ti,am437x-vpfe-interface = <0>;
+   bus-width = <8>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+  };
+ };
+};
+
+&vpfe1 {
+ status = "okay";
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&vpfe1_pins_default>;
+ pinctrl-1 = <&vpfe1_pins_sleep>;
+
+ port {
+  vpfe1_ep: endpoint {
+   remote-endpoint = <&ov2659_0>;
+   ti,am437x-vpfe-interface = <0>;
+   bus-width = <8>;
+   hsync-active = <0>;
+   vsync-active = <0>;
+  };
+ };
+};
+
+&mcasp1 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&mcasp1_pins>;
+ pinctrl-1 = <&mcasp1_sleep_pins>;
+
+ status = "okay";
+
+ op-mode = <0>;
+ tdm-slots = <2>;
+
+ serial-dir = <
+  0 0 1 2
+ >;
+ tx-num-evt = <32>;
+ rx-num-evt = <32>;
+};
+
+&wkup_m3_ipc {
+ ti,set-io-isolation;
+ ti,scale-data-fw = "am43x-evm-scale-data.bin";
+};
+
+&cpu {
+ cpu0-supply = <&dcdc2>;
+};
+
+&rtc {
+ status = "okay";
+ ext-clk-src;
+};
+
+&sgx {
+ status = "okay";
+};