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authorAlison Wang <b18965@freescale.com>2017-04-11 15:02:13 +0800
committerYork Sun <york.sun@nxp.com>2017-04-24 08:59:43 -0700
commit5d267ec67901d9e5fd6e535eec84bd9176501403 (patch)
tree1cca1ed7acdbe9abef543f0b964075492be2f8a0 /.checkpatch.conf
parent3c476d841daa491f87c8f07851038afbdf4d90a8 (diff)
arm: ls1021atwr: Enable RGMII TX/RX clock internal delay for AR8033
Since commit ce412b7, RGMII TX clock internal delay is not enabled for AR8033 unconditionally. On LS1021ATWR board, the third port eTSEC3 uses AR8033 in RGMII mode. The TX/RX internal delay needs to be enabled. This patch will set PHY_INTERFACE_MODE_RGMII_ID to enable RGMII TX/RX clock internal delay for AR8033 on the third port. Signed-off-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
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