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| author | Shengzhou Liu <Shengzhou.Liu@nxp.com> | 2016-05-31 15:39:06 +0800 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-06-03 22:12:54 -0700 |
| commit | 534992827756c3a1ab49823ca487702a954fe433 (patch) | |
| tree | f00bfe6d3ebd02c921963584bb491fa63c7aa151 /.mailmap | |
| parent | ed4708aaeaf74008d199866bfbd450d91439a9cf (diff) | |
board/freescale: Use unified setup_ddr_tlbs for spl boot and non-spl boot
We should use unified setup_ddr_tlbs() for spl boot and non-spl boot
to make sure 'M' bit is set for DDR TLB to maintain cache coherence.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to '.mailmap')
0 files changed, 0 insertions, 0 deletions