diff options
author | Bin Meng <bmeng.cn@gmail.com> | 2020-03-28 07:25:29 -0700 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2020-04-10 15:54:16 -0400 |
commit | 49fb28a4b29ee40e38eb92a1dcb69058ce4637af (patch) | |
tree | 1a2b5826d92e13bfae2232ef0c5c13000a966648 /.travis.yml | |
parent | b2c2608161c997a1ffeb2091ff77c845f602524d (diff) |
azure/gitlab/travis: Add RISC-V SPL testing
This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
we test SPL running in M-mode and U-Boot proper running in S-mode,
with a 4-core SMP configuration.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to '.travis.yml')
-rw-r--r-- | .travis.yml | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/.travis.yml b/.travis.yml index 52ce104bc1..2636847049 100644 --- a/.travis.yml +++ b/.travis.yml @@ -191,6 +191,14 @@ before_script: true && popd; fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi + - if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then + wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ; + export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin; + fi script: # Comments must be outside the command strings below, or the Travis parser @@ -586,6 +594,20 @@ matrix: QEMU_TARGET="riscv64-softmmu" BUILDMAN="^qemu-riscv64$" TOOLCHAIN="riscv" + - name: "test/py qemu-riscv32_spl" + env: + - TEST_PY_BD="qemu-riscv32_spl" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="riscv32-softmmu" + BUILDMAN="^qemu-riscv32_spl$" + TOOLCHAIN="riscv" + - name: "test/py qemu-riscv64_spl" + env: + - TEST_PY_BD="qemu-riscv64_spl" + TEST_PY_TEST_SPEC="not sleep" + QEMU_TARGET="riscv64-softmmu" + BUILDMAN="^qemu-riscv64_spl$" + TOOLCHAIN="riscv" - name: "test/py qemu-x86" env: - TEST_PY_BD="qemu-x86" |