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author | Markus Niebel <Markus.Niebel@tqs.de> | 2014-02-17 17:33:18 +0100 |
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committer | Jagannadha Sutradharudu Teki <jaganna@xilinx.com> | 2014-02-18 22:29:26 +0530 |
commit | 060aaada06ffdcd21c01180a07779551448d13ff (patch) | |
tree | 2eea2ede22a6117c714cd8f9b0c1045204d4bd38 | |
parent | 5d584ccec106f8919ce39562e062d822770513b7 (diff) |
spi: mxc_spi: i.MX6 DL/S have only 4 eCSPI controller
The dual lite and solo variant have only 4 SPI controller.
respect this in the MXC_SPI_BASE_ADRESSES macro
Signed-off-by: Markus Niebel <Markus.Niebel@tqs.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
-rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 3c58c01185..26f2a8848f 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -409,7 +409,7 @@ struct cspi_regs { #define MXC_CSPICON_POL 4 /* SCLK polarity */ #define MXC_CSPICON_SSPOL 12 /* SS polarity */ #define MXC_CSPICON_CTL 20 /* inactive state of SCLK */ -#ifdef CONFIG_MX6SL +#if defined(CONFIG_MX6SL) || defined(CONFIG_MX6DL) #define MXC_SPI_BASE_ADDRESSES \ ECSPI1_BASE_ADDR, \ ECSPI2_BASE_ADDR, \ |