diff options
| author | Heiko Schocher <hs@denx.de> | 2011-09-14 19:59:39 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-09-30 22:00:59 +0200 |
| commit | 0a0522cbff152aaff786499363366b76de261a69 (patch) | |
| tree | 32b941c0cf37ca2401e819d5c04cf182743b1f1b | |
| parent | 310ae55efe14aa7923b16c718cbdb22ec364b18b (diff) | |
arm, davinci, da8xx: add cpuinfo
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/cpu.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/davinci/cpu.c b/arch/arm/cpu/arm926ejs/davinci/cpu.c index b705dfd318..02819f6f74 100644 --- a/arch/arm/cpu/arm926ejs/davinci/cpu.c +++ b/arch/arm/cpu/arm926ejs/davinci/cpu.c @@ -115,7 +115,18 @@ int clk_get(enum davinci_clk_ids id) out: return pll_out; } -#endif /* CONFIG_SOC_DA8XX */ +#ifdef CONFIG_DISPLAY_CPUINFO +int print_cpuinfo(void) +{ + printf("Cores: ARM %d MHz", + clk_get(DAVINCI_ARM_CLKID) / 1000000); + printf("\nDDR: %d MHz\n", + /* DDR PHY uses an x2 input clock */ + clk_get(0x10001) / 1000000); + return 0; +} +#endif +#else /* CONFIG_SOC_DA8XX */ #ifdef CONFIG_DISPLAY_CPUINFO @@ -194,7 +205,8 @@ unsigned int davinci_arm_clk_get() return pll_sysclk_mhz(DAVINCI_PLL_CNTRL0_BASE, ARM_PLLDIV) * 1000000; } #endif -#endif +#endif /* CONFIG_DISPLAY_CPUINFO */ +#endif /* !CONFIG_SOC_DA8XX */ /* * Initializes on-chip ethernet controllers. |