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| author | Sébastien Szymanski <sebastien.szymanski@armadeus.com> | 2019-05-14 13:33:46 +0200 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2019-06-11 10:42:48 +0200 |
| commit | 0ab85fe68f34ce06d8baed0f56dd7cd7c6d426f2 (patch) | |
| tree | cd9a2bf8847de1b97d5fd6518fae2c5a4b02ace2 | |
| parent | 0633e134784aba58ee664e9fbcee4afe1588d2be (diff) | |
opos6ul: set REFSEL and REFR fields
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
| -rw-r--r-- | arch/arm/mach-imx/mx6/opos6ul.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mx6/opos6ul.c b/arch/arm/mach-imx/mx6/opos6ul.c index 94a3d71201..264fa8a48e 100644 --- a/arch/arm/mach-imx/mx6/opos6ul.c +++ b/arch/arm/mach-imx/mx6/opos6ul.c @@ -192,6 +192,8 @@ struct mx6_ddr_sysinfo ddr_sysinfo = { .sde_to_rst = 0x10, /* 14 cycles, 200us (JEDEC default) */ .rst_to_cke = 0x23, /* 33 cycles, 500us (JEDEC default) */ .ddr_type = DDR_TYPE_DDR3, + .refsel = 1, /* Refresh cycles at 32KHz */ + .refr = 7, /* 8 refreshes commands per refresh cycle */ }; static struct mx6_ddr3_cfg mem_ddr = { |