diff options
| author | Stefan Roese <sr@denx.de> | 2017-03-10 15:40:31 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2017-03-23 10:52:28 +0100 |
| commit | 1304f4bb8ed0971ca28e8b519b831c9f99295286 (patch) | |
| tree | 103319945fb9d5a4515d0a52f379cf1e94d0ce4d | |
| parent | 2399e40120f7a04fc24d496f486e5e406852538f (diff) | |
arm: mvebu: theadorable: Add board-specific PEX detection pulse width
Define a board-specific detection pulse-width array for the SerDes PCIe
interfaces. If not defined in the board code, the default of currently 2
is used. Values from 0...3 are possible (2 bits).
In this case of the theadorable board, PEX interface 0 needs a value
of 0 for the detection pulse width so that the PCIe device (Atheros
WLAN PCIe device) is consistantly detected.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Adam Shobash <adams@marvell.com>
Cc: Nadav Haklai <nadavh@marvell.com>
Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
| -rw-r--r-- | board/theadorable/theadorable.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/board/theadorable/theadorable.c b/board/theadorable/theadorable.c index d621682d07..d4242170c7 100644 --- a/board/theadorable/theadorable.c +++ b/board/theadorable/theadorable.c @@ -115,6 +115,13 @@ MV_BIN_SERDES_CFG theadorable_serdes_cfg[] = { }, }; +/* + * Define a board-specific detection pulse-width array for the SerDes PCIe + * interfaces. If not defined in the board code, the default of currently 2 + * is used. Values from 0...3 are possible (2 bits). + */ +u8 serdes_pex_pulse_width[4] = { 0, 2, 2, 2 }; + MV_DRAM_MODES *ddr3_get_static_ddr_mode(void) { /* Only one mode supported for this board */ |