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authorStephen Warren <swarren@nvidia.com>2016-09-13 10:46:00 -0600
committerTom Warren <twarren@nvidia.com>2016-09-27 09:11:03 -0700
commit140a9eaff1f25fb0c19dae52a9431c109c45daa7 (patch)
treede6fccdeea49161139316233966bcf0ad45d23e2
parent74686766847146e4408486c5e3ca8a1681b145c0 (diff)
ARM: tegra: enable standard clock/reset APIs everywhere
Implementations of the standard clock and reset APIs are available on all Tegra SoCs now, so enable compilation of those uclasses. Enable the Tegra CAR drivers for all SoCs prior to the BPMP being available. This provides an implementation of those APIs everywhere. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
-rw-r--r--arch/arm/mach-tegra/Kconfig14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig
index fb4b32e8b7..316feba29d 100644
--- a/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@ -22,6 +22,7 @@ config TEGRA_IVC
config TEGRA_COMMON
bool "Tegra common options"
+ select CLK
select DM
select DM_ETH
select DM_GPIO
@@ -31,12 +32,20 @@ config TEGRA_COMMON
select DM_PCI
select DM_PCI_COMPAT
select DM_PWM
+ select DM_RESET
select DM_SERIAL
select DM_SPI
select DM_SPI_FLASH
+ select MISC
select OF_CONTROL
select VIDCONSOLE_AS_LCD if DM_VIDEO
+config TEGRA_NO_BPMP
+ bool "Tegra common options for SoCs without BPMP"
+ select TEGRA_CAR
+ select TEGRA_CAR_CLOCK
+ select TEGRA_CAR_RESET
+
config TEGRA_ARMV7_COMMON
bool "Tegra 32-bit common options"
select CPU_V7
@@ -44,6 +53,7 @@ config TEGRA_ARMV7_COMMON
select SUPPORT_SPL
select TEGRA_COMMON
select TEGRA_GPIO
+ select TEGRA_NO_BPMP
config TEGRA_ARMV8_COMMON
bool "Tegra 64-bit common options"
@@ -74,13 +84,11 @@ config TEGRA210
bool "Tegra210 family"
select TEGRA_GPIO
select TEGRA_ARMV8_COMMON
+ select TEGRA_NO_BPMP
config TEGRA186
bool "Tegra186 family"
- select CLK
select DM_MAILBOX
- select DM_RESET
- select MISC
select TEGRA186_BPMP
select TEGRA186_CLOCK
select TEGRA186_GPIO