diff options
| author | Fabien Dessenne <fabien.dessenne@st.com> | 2019-05-14 11:20:37 +0200 |
|---|---|---|
| committer | Patrick Delaunay <patrick.delaunay@st.com> | 2019-07-12 11:18:53 +0200 |
| commit | 1958dae4f3f9ec5b050273f3c00b08fbe9a7cbd6 (patch) | |
| tree | 513fb3befd329ce6917cb778ebdebb412c1d41fe | |
| parent | 8da622d81828de13376d9b5afbcab48fb3eae957 (diff) | |
ARM: dts: stm32: Add ipcc mailbox support on stm32mp1
Add IPCC mailbox support on stm32mp157 eval and disco boards.
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| -rw-r--r-- | arch/arm/dts/stm32mp157a-dk1.dts | 4 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp157c-ed1.dts | 4 | ||||
| -rw-r--r-- | arch/arm/dts/stm32mp157c.dtsi | 13 |
3 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index e36773dde9..b8dd4baec5 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -228,6 +228,10 @@ }; }; +&ipcc { + status = "okay"; +}; + &iwdg2 { timeout-sec = <32>; status = "okay"; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index b10208f698..ab11c832ec 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -318,6 +318,10 @@ }; }; +&ipcc { + status = "okay"; +}; + &iwdg2 { timeout-sec = <32>; status = "okay"; diff --git a/arch/arm/dts/stm32mp157c.dtsi b/arch/arm/dts/stm32mp157c.dtsi index 73215855cc..b9f0eacf71 100644 --- a/arch/arm/dts/stm32mp157c.dtsi +++ b/arch/arm/dts/stm32mp157c.dtsi @@ -849,6 +849,19 @@ status = "disabled"; }; + ipcc: mailbox@4c001000 { + compatible = "st,stm32mp1-ipcc"; + #mbox-cells = <1>; + reg = <0x4c001000 0x400>; + st,proc-id = <0>; + interrupts-extended = + <&intc GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, + <&intc GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "rx", "tx"; + clocks = <&rcc IPCC>; + status = "disabled"; + }; + rcc: rcc@50000000 { compatible = "st,stm32mp1-rcc", "syscon"; reg = <0x50000000 0x1000>; |