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authorJagan Teki <jteki@openedev.com>2015-12-28 22:08:40 +0530
committerJagan Teki <jteki@openedev.com>2016-01-13 18:47:27 +0530
commit1c17f5ec571cac6e0867f64607b052d6ffa0b1c1 (patch)
treea3a5daef164a1a09e8d7ee85d5fbe91f81b81d7a
parent465c00d78e57209fb11ba5e6bc6abfc501ed07de (diff)
sf: Make IO modes at last in read modes
SLOW, FAST, DUAL, DUAL_IO, QUAD, QUAD_IO changed order to SLOW, FAST, DUAL, QUAD, DUAL_IO, QUAD_IO Cc: Simon Glass <sjg@chromium.org> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jteki@openedev.com>
-rw-r--r--drivers/mtd/spi/sf_internal.h4
-rw-r--r--drivers/mtd/spi/spi_flash.c2
-rw-r--r--include/spi.h2
3 files changed, 4 insertions, 4 deletions
diff --git a/drivers/mtd/spi/sf_internal.h b/drivers/mtd/spi/sf_internal.h
index 55ba81e87b..007a5a085c 100644
--- a/drivers/mtd/spi/sf_internal.h
+++ b/drivers/mtd/spi/sf_internal.h
@@ -25,8 +25,8 @@ enum spi_read_cmds {
ARRAY_SLOW = BIT(0),
ARRAY_FAST = BIT(1),
DUAL_OUTPUT_FAST = BIT(2),
- DUAL_IO_FAST = BIT(3),
- QUAD_OUTPUT_FAST = BIT(4),
+ QUAD_OUTPUT_FAST = BIT(3),
+ DUAL_IO_FAST = BIT(4),
QUAD_IO_FAST = BIT(5),
};
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
index 5766c187f9..a567414669 100644
--- a/drivers/mtd/spi/spi_flash.c
+++ b/drivers/mtd/spi/spi_flash.c
@@ -975,8 +975,8 @@ int spi_flash_scan(struct spi_flash *flash)
CMD_READ_ARRAY_SLOW,
CMD_READ_ARRAY_FAST,
CMD_READ_DUAL_OUTPUT_FAST,
- CMD_READ_DUAL_IO_FAST,
CMD_READ_QUAD_OUTPUT_FAST,
+ CMD_READ_DUAL_IO_FAST,
CMD_READ_QUAD_IO_FAST };
/* Read the ID codes */
diff --git a/include/spi.h b/include/spi.h
index 80f8523076..85866a27fc 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -30,7 +30,7 @@
#define SPI_RX_SLOW BIT(0) /* receive with 1 wire slow */
#define SPI_RX_FAST BIT(1) /* receive with 1 wire fast */
#define SPI_RX_DUAL BIT(2) /* receive with 2 wires */
-#define SPI_RX_QUAD BIT(4) /* receive with 4 wires */
+#define SPI_RX_QUAD BIT(3) /* receive with 4 wires */
/* SPI bus connection options - see enum spi_dual_flash */
#define SPI_CONN_DUAL_SHARED (1 << 0)