diff options
| author | Jagan Teki <jagan@openedev.com> | 2017-02-24 15:45:13 +0530 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2017-03-17 09:27:08 +0100 |
| commit | 20f147141698b9f302c3382fcc45a1ef1a341cec (patch) | |
| tree | 5c24fcd2e6ddedbbcd18feb41e6828ca2c4c6de7 | |
| parent | cba586b40093990d89892e7704f5e6b71f437520 (diff) | |
imx: spl: Update NAND bootmode detection bit
BOOT_CFG1[7:4] the NAND boot mode selection is done
only when BOOT_CFG1[7] is 1 hence update the NAND
boot mode detection bit case. This information available
on Table 8-11. NAND Boot eFUSE Descriptions, from IMX6DQRM.
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@openedev.com>
| -rw-r--r-- | arch/arm/imx-common/spl.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/imx-common/spl.c b/arch/arm/imx-common/spl.c index 6c20f28e10..81fc0ca252 100644 --- a/arch/arm/imx-common/spl.c +++ b/arch/arm/imx-common/spl.c @@ -63,8 +63,8 @@ u32 spl_boot_device(void) case 0x6: case 0x7: return BOOT_DEVICE_MMC1; - /* NAND Flash: 8.5.2 */ - case 0x8 ... 0xf: + /* NAND Flash: 8.5.2, Table 8-10 */ + case 0x8: return BOOT_DEVICE_NAND; } return BOOT_DEVICE_NONE; |