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authorStefan Roese <sr@denx.de>2015-04-17 18:12:41 +0200
committerLuka Perkov <luka.perkov@sartura.hr>2015-07-23 10:37:10 +0200
commit21427708a654ca7b0af0a2a95bdd6391226b276c (patch)
tree8d5c23907d190322d5e7f085619bd4769a4f0fc7
parentade741b3896b1a3872ff74437f04b50762d05849 (diff)
arm: mvebu: Use default reg base address for SPL on A38x
On A38x switching the regs base address without running from SDRAM doesn't seem to work. So let the SPL still use the default base address and switch to the new address in the mail u-boot later. Signed-off-by: Stefan Roese <sr@denx.de>
-rw-r--r--arch/arm/mach-mvebu/include/mach/soc.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h
index 619bc7efd1..125b5f278d 100644
--- a/arch/arm/mach-mvebu/include/mach/soc.h
+++ b/arch/arm/mach-mvebu/include/mach/soc.h
@@ -28,7 +28,17 @@
/* SOC specific definations */
#define INTREG_BASE 0xd0000000
#define INTREG_BASE_ADDR_REG (INTREG_BASE + 0x20080)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SYS_MVEBU_DDR_A38X)
+/*
+ * On A38x switching the regs base address without running from
+ * SDRAM doesn't seem to work. So let the SPL still use the
+ * default base address and switch to the new address in the
+ * main u-boot later.
+ */
+#define SOC_REGS_PHY_BASE 0xd0000000
+#else
#define SOC_REGS_PHY_BASE 0xf1000000
+#endif
#define MVEBU_REGISTER(x) (SOC_REGS_PHY_BASE + x)
#define MVEBU_SDRAM_SCRATCH (MVEBU_REGISTER(0x01504))