diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2013-05-05 15:52:54 +0000 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2013-05-06 09:55:51 +0200 |
| commit | 26be20fac02ef0e52be8b9aab0a97251c5f01785 (patch) | |
| tree | 410ef495c1c93669139099636effaadd8eb8724b | |
| parent | ba5dfc11baea8c90c53733fc1fa988c2d13787dc (diff) | |
mx23: Operate DDR voltage supply at 2.5V
After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage
at the recommended 2.5V voltage level again.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| -rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index 41fb803918..4ed197b51d 100644 --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c @@ -247,7 +247,7 @@ static void mx23_mem_setup_vddmem(void) struct mxs_power_regs *power_regs = (struct mxs_power_regs *)MXS_POWER_BASE; - writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_ILIMIT | POWER_VDDMEMCTRL_ENABLE_LINREG | POWER_VDDMEMCTRL_PULLDOWN_ACTIVE, @@ -255,7 +255,7 @@ static void mx23_mem_setup_vddmem(void) early_delay(10000); - writel((0x12 << POWER_VDDMEMCTRL_TRG_OFFSET) | + writel((0x10 << POWER_VDDMEMCTRL_TRG_OFFSET) | POWER_VDDMEMCTRL_ENABLE_LINREG, &power_regs->hw_power_vddmemctrl); } |