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authorBecky Bruce <becky.bruce@freescale.com>2008-11-20 16:43:52 -0600
committerJon Loeliger <jdl@freescale.com>2008-12-01 10:28:52 -0600
commit29382d4064fbaff5daacff4c3209370fa5713966 (patch)
treefa1a63c62836a7e1a4201e9f47bdada950bd1123
parent801a194616d95e6fc426a176d9615ccbf9876c7f (diff)
mpc8641: Fix error in README
I made some updates to the code that didn't make it into the README - fix this Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
-rw-r--r--doc/README.mpc8641hpcn10
1 files changed, 5 insertions, 5 deletions
diff --git a/doc/README.mpc8641hpcn b/doc/README.mpc8641hpcn
index 5ac39e6782..d8fe0a4a13 100644
--- a/doc/README.mpc8641hpcn
+++ b/doc/README.mpc8641hpcn
@@ -134,15 +134,15 @@ For 36-bit-enabled u-boot, the virtual map is the same as for 32-bit.
However, the physical map is altered to reside in 36-bit space, as follows.
Addresses are no longer mapped with VA == PA. All accesses from
software use the VA; the PA is only used for setting up windows
-and mappings. Note that the low 32 bits are the same as the VA above;
-only the top 4 bits vary:
+and mappings. Note that with the exception of PCI MEM and RIO, the low
+ 32 bits are the same as the VA above; only the top 4 bits vary:
Memory Range Device Size
------------ ------ ----
0x0_0000_0000 0x0_7fff_ffff DDR 2G
- 0xc_8000_0000 0xc_9fff_ffff RIO MEM 512M
- 0xc_8000_0000 0xc_9fff_ffff PCI1/PEX1 MEM 512M
- 0xc_a000_0000 0xc_bfff_ffff PCI2/PEX2 MEM 512M
+ 0xc_0000_0000 0xc_1fff_ffff RIO MEM 512M
+ 0xc_0000_0000 0xc_1fff_ffff PCI1/PEX1 MEM 512M
+ 0xc_2000_0000 0xc_3fff_ffff PCI2/PEX2 MEM 512M
0xf_ffe0_0000 0xf_ffef_ffff CCSR 1M
0xf_ffdf_0000 0xf_ffdf_7fff PIXIS 8K
0xf_ffdf_8000 0xf_ffdf_ffff CF 8K