diff options
| author | Jagan Teki <jteki@openedev.com> | 2015-12-28 22:24:08 +0530 |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2016-01-13 18:47:27 +0530 |
| commit | 29ee0262e11d73c3602d9f0a5a8f1030e76008c1 (patch) | |
| tree | 6d1a5eda32ecd695e1d953ba2ad725ad2f32c3a0 | |
| parent | e26a2e2cd96d1e885292880e1d71233a9dc04518 (diff) | |
spi: Use BIT macro
Used BIT macro like 1 << nr as BIT(nr) where nr is 0...n
Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
| -rw-r--r-- | include/spi.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/include/spi.h b/include/spi.h index 82e72ab38b..dbd0df89a7 100644 --- a/include/spi.h +++ b/include/spi.h @@ -11,26 +11,26 @@ #define _SPI_H_ /* SPI mode flags */ -#define SPI_CPHA 0x01 /* clock phase */ -#define SPI_CPOL 0x02 /* clock polarity */ +#define SPI_CPHA BIT(0) /* clock phase */ +#define SPI_CPOL BIT(1) /* clock polarity */ #define SPI_MODE_0 (0|0) /* (original MicroWire) */ #define SPI_MODE_1 (0|SPI_CPHA) #define SPI_MODE_2 (SPI_CPOL|0) #define SPI_MODE_3 (SPI_CPOL|SPI_CPHA) -#define SPI_CS_HIGH 0x04 /* CS active high */ -#define SPI_LSB_FIRST 0x08 /* per-word bits-on-wire */ -#define SPI_3WIRE 0x10 /* SI/SO signals shared */ -#define SPI_LOOP 0x20 /* loopback mode */ -#define SPI_SLAVE 0x40 /* slave mode */ -#define SPI_PREAMBLE 0x80 /* Skip preamble bytes */ -#define SPI_TX_BYTE 0x100 /* transmit with 1 wire byte */ -#define SPI_TX_QUAD 0x200 /* transmit with 4 wires */ +#define SPI_CS_HIGH BIT(2) /* CS active high */ +#define SPI_LSB_FIRST BIT(3) /* per-word bits-on-wire */ +#define SPI_3WIRE BIT(4) /* SI/SO signals shared */ +#define SPI_LOOP BIT(5) /* loopback mode */ +#define SPI_SLAVE BIT(6) /* slave mode */ +#define SPI_PREAMBLE BIT(7) /* Skip preamble bytes */ +#define SPI_TX_BYTE BIT(8) /* transmit with 1 wire byte */ +#define SPI_TX_QUAD BIT(9) /* transmit with 4 wires */ /* SPI mode_rx flags */ -#define SPI_RX_SLOW (1 << 0) -#define SPI_RX_FAST (1 << 1) -#define SPI_RX_DUAL (1 << 2) -#define SPI_RX_QUAD (1 << 4) +#define SPI_RX_SLOW BIT(0) +#define SPI_RX_FAST BIT(1) +#define SPI_RX_DUAL BIT(2) +#define SPI_RX_QUAD BIT(4) /* SPI bus connection options - see enum spi_dual_flash */ #define SPI_CONN_DUAL_SHARED (1 << 0) @@ -116,12 +116,12 @@ struct spi_slave { u8 option; u8 flags; -#define SPI_XFER_BEGIN 0x01 /* Assert CS before transfer */ -#define SPI_XFER_END 0x02 /* Deassert CS after transfer */ +#define SPI_XFER_BEGIN BIT(0) /* Assert CS before transfer */ +#define SPI_XFER_END BIT(1) /* Deassert CS after transfer */ #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) -#define SPI_XFER_MMAP 0x04 /* Memory Mapped start */ -#define SPI_XFER_MMAP_END 0x08 /* Memory Mapped End */ -#define SPI_XFER_U_PAGE 0x10 +#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ +#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ +#define SPI_XFER_U_PAGE BIT(4) }; /** |