diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2015-05-16 09:33:19 +0800 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-06-04 02:39:39 -0600 |
| commit | 2aa3a7fb1c24afd4c0e12360acccf3234d8fe019 (patch) | |
| tree | 2ed7feffb08aed813af2c65cca3df0cf497b966f | |
| parent | a40abfcc0008e3164caeee4dcd1294fda7675511 (diff) | |
x86: qemu: Add ATA/SATA support
Enable legacy IDE support on the pc target and AHCI support on the
q35 target. Default configuration is to support the pc target.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | include/configs/qemu-x86.h | 26 | ||||
| -rw-r--r-- | include/pci_ids.h | 1 |
2 files changed, 26 insertions, 1 deletions
diff --git a/include/configs/qemu-x86.h b/include/configs/qemu-x86.h index e2a223fdd6..77f88d2422 100644 --- a/include/configs/qemu-x86.h +++ b/include/configs/qemu-x86.h @@ -36,8 +36,32 @@ "stdout=serial,vga\0" \ "stderr=serial,vga\0" +/* + * ATA/SATA support for QEMU x86 targets + * - Only legacy IDE controller is supported for QEMU '-M pc' target + * - AHCI controller is supported for QEMU '-M q35' target + * + * Default configuraion is to support the QEMU default x86 target + * Undefine CONFIG_CMD_IDE to support q35 target + */ +#define CONFIG_CMD_IDE +#ifdef CONFIG_CMD_IDE +#define CONFIG_SYS_IDE_MAXBUS 2 +#define CONFIG_SYS_IDE_MAXDEVICE 4 +#define CONFIG_SYS_ATA_BASE_ADDR 0 +#define CONFIG_SYS_ATA_DATA_OFFSET 0 +#define CONFIG_SYS_ATA_REG_OFFSET 0 +#define CONFIG_SYS_ATA_ALT_OFFSET 0 +#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0 +#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170 +#define CONFIG_ATAPI + +#undef CONFIG_SCSI_AHCI +#undef CONFIG_CMD_SCSI +#else #define CONFIG_SCSI_DEV_LIST \ - {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_1} + {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI} +#endif /* GPIO is not supported */ #undef CONFIG_INTEL_ICH6_GPIO diff --git a/include/pci_ids.h b/include/pci_ids.h index 2e6685112b..5771e12e72 100644 --- a/include/pci_ids.h +++ b/include/pci_ids.h @@ -2838,6 +2838,7 @@ #define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930 #define PCI_DEVICE_ID_INTEL_ICH9_7 0x2916 #define PCI_DEVICE_ID_INTEL_ICH9_8 0x2918 +#define PCI_DEVICE_ID_INTEL_ICH9_AHCI 0x2922 #define PCI_DEVICE_ID_INTEL_I7_MCR 0x2c18 #define PCI_DEVICE_ID_INTEL_I7_MC_TAD 0x2c19 #define PCI_DEVICE_ID_INTEL_I7_MC_RAS 0x2c1a |