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authorChuanhua Han <chuanhua.han@nxp.com>2019-08-08 17:04:58 +0800
committerPriyanka Jain <priyanka.jain@nxp.com>2019-09-12 16:15:42 +0530
commit2f2a19757b4d74cb7af1f5d35dac05a9ac04acc7 (patch)
treea6676cd268746df89340f6ace9cec6a3282d9031
parent412e25ab5faafcfe8bca263b44e347566075317e (diff)
armv8: fsl-layerscape: Update I2C clock divider
By default, i2c input clock is programmed at platform clk / 2 in u-boot, but this is not correct for all the platforms, Update I2C clock divider's default values as per SoC (LS1012A, LS1028A, LX2160A and LS1088A). Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 54d03ae622..24c606a232 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -501,6 +501,10 @@ config SYS_FSL_I2C_CLK_DIV
config SYS_FSL_IFC_CLK_DIV
int "IFC clock divider"
default 1 if ARCH_LS1043A
+ default 4 if ARCH_LS1012A
+ default 4 if ARCH_LS1028A
+ default 8 if ARCH_LX2160A
+ default 8 if ARCH_LS1088A
default 2
help
This is the divider that is used to derive IFC clock from Platform