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authorBenoît Thébaudeau <benoit.thebaudeau@advansee.com>2012-11-13 09:57:59 +0000
committerStefano Babic <sbabic@denx.de>2012-11-16 09:16:45 +0100
commit34d33b671a03da1c115d83a603fb36da0360b20a (patch)
treeb55eb27eb9fae07183e532b3f53a7af2870f3c49
parent9fa3d093d626b25c64c695e29d381dd2ae7bf8cc (diff)
ehci-mxc: Define host offsets
Some MXC SoCs like the i.MX35 have hosts located at unusual offsets, so prepare to the introduction of i.MX35 support by defining the ehci-mxc hosts offsets at SoC level. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
-rw-r--r--arch/arm/include/asm/arch-mx25/imx-regs.h1
-rw-r--r--arch/arm/include/asm/arch-mx31/imx-regs.h1
-rw-r--r--drivers/usb/host/ehci-mxc.c2
3 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-mx25/imx-regs.h b/arch/arm/include/asm/arch-mx25/imx-regs.h
index 738d4115e9..5f4b543823 100644
--- a/arch/arm/include/asm/arch-mx25/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx25/imx-regs.h
@@ -241,6 +241,7 @@ struct aips_regs {
#define IMX_RTIC_BASE (0x53FEC000)
#define IMX_IIM_BASE (0x53FF0000)
#define IMX_USB_BASE (0x53FF4000)
+#define IMX_USB_PORT_OFFSET 0x200
#define IMX_CSI_BASE (0x53FF8000)
#define IMX_DRYICE_BASE (0x53FFC000)
diff --git a/arch/arm/include/asm/arch-mx31/imx-regs.h b/arch/arm/include/asm/arch-mx31/imx-regs.h
index 01a849dd8a..ae3658b639 100644
--- a/arch/arm/include/asm/arch-mx31/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx31/imx-regs.h
@@ -895,6 +895,7 @@ struct esdc_regs {
#define MX31_AIPS1_BASE_ADDR 0x43f00000
#define IMX_USB_BASE (MX31_AIPS1_BASE_ADDR + 0x88000)
+#define IMX_USB_PORT_OFFSET 0x200
/*
* CSPI register definitions
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c
index 846aa3b7c9..6260a8c939 100644
--- a/drivers/usb/host/ehci-mxc.c
+++ b/drivers/usb/host/ehci-mxc.c
@@ -169,7 +169,7 @@ int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor)
udelay(80);
ehci = (struct usb_ehci *)(IMX_USB_BASE +
- (0x200 * CONFIG_MXC_USB_PORT));
+ IMX_USB_PORT_OFFSET * CONFIG_MXC_USB_PORT);
*hccr = (struct ehci_hccr *)((uint32_t)&ehci->caplength);
*hcor = (struct ehci_hcor *)((uint32_t) *hccr +
HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));