diff options
author | Remy Bohmer <linux@bohmer.net> | 2009-10-28 22:13:37 +0100 |
---|---|---|
committer | Wolfgang Denk <wd@denx.de> | 2009-11-23 23:43:37 +0100 |
commit | 41dfd8a60324243dbe2dc313a607910824a68aa7 (patch) | |
tree | 5cb541f3096093cf4c5ee68c6b5337c80e2d9ba5 | |
parent | faf36c1437c95e4a86835633d9801c5f6396a3c7 (diff) |
Add support for CS2 dataflash for Atmel-SPI.
The only missing chipselect line support is CS2, and I need it on
CS2...
Signed-off-by: Remy Bohmer <linux@bohmer.net>
-rw-r--r-- | drivers/spi/atmel_dataflash_spi.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c index 614965c367..3a648e6190 100644 --- a/drivers/spi/atmel_dataflash_spi.c +++ b/drivers/spi/atmel_dataflash_spi.c @@ -30,7 +30,8 @@ #include <dataflash.h> #define AT91_SPI_PCS0_DATAFLASH_CARD 0xE /* Chip Select 0: NPCS0%1110 */ -#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 0: NPCS0%1101 */ +#define AT91_SPI_PCS1_DATAFLASH_CARD 0xD /* Chip Select 1: NPCS1%1101 */ +#define AT91_SPI_PCS2_DATAFLASH_CARD 0xB /* Chip Select 2: NPCS2%1011 */ #define AT91_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */ void AT91F_SpiInit(void) @@ -57,7 +58,14 @@ void AT91F_SpiInit(void) ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), AT91_BASE_SPI + AT91_SPI_CSR(1)); #endif - +#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2 + /* Configure CS2 */ + writel(AT91_SPI_NCPHA | + (AT91_SPI_DLYBS & DATAFLASH_TCSS) | + (AT91_SPI_DLYBCT & DATAFLASH_TCHS) | + ((get_mck_clk_rate() / AT91_SPI_CLK) << 8), + AT91_BASE_SPI + AT91_SPI_CSR(2)); +#endif #ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 /* Configure CS3 */ writel(AT91_SPI_NCPHA | @@ -99,6 +107,12 @@ void AT91F_SpiEnable(int cs) writel(mode | ((AT91_SPI_PCS1_DATAFLASH_CARD<<16) & AT91_SPI_PCS), AT91_BASE_SPI + AT91_SPI_MR); break; + case 2: /* Configure SPI CS2 for Serial DataFlash AT45DBxx */ + mode = readl(AT91_BASE_SPI + AT91_SPI_MR); + mode &= 0xFFF0FFFF; + writel(mode | ((AT91_SPI_PCS2_DATAFLASH_CARD<<16) & AT91_SPI_PCS), + AT91_BASE_SPI + AT91_SPI_MR); + break; case 3: mode = readl(AT91_BASE_SPI + AT91_SPI_MR); mode &= 0xFFF0FFFF; |