diff options
| author | Marek Vasut <marex@denx.de> | 2018-07-12 15:34:23 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2018-07-25 00:13:32 +0200 |
| commit | 42f4b83b52735d698bf3f3de2665bf6d42db9f1c (patch) | |
| tree | 86875ca95471aea0debf6d86e8733190decca7bc | |
| parent | 937db7188e3a5ab8f802eff9b57854189379667a (diff) | |
ARM: socfpga: Init missing security policies on A10
The Arria10 requires proper configuration of the NOC firewall, otherwise
the access to certain areas of the LWHPS bridge fails in Linux. Add the
missing setup.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/mach-socfpga/misc_arria10.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c index a75cbc4ce6..80bf2f036f 100644 --- a/arch/arm/mach-socfpga/misc_arria10.c +++ b/arch/arm/mach-socfpga/misc_arria10.c @@ -93,6 +93,19 @@ static void initialize_security_policies(void) /* Put OCRAM in non-secure */ writel(0x003f0000, &noc_fw_ocram_base->region0); writel(0x1, &noc_fw_ocram_base->enable); + + /* Put DDR in non-secure */ + writel(0xffff0000, SOCFPGA_SDR_FIREWALL_L3_ADDRESS + 0xc); + writel(0x1, SOCFPGA_SDR_FIREWALL_L3_ADDRESS); + + /* Enable priviledged and non-priviledged access to L4 peripherals */ + writel(~0, SOCFPGA_NOC_L4_PRIV_FLT_OFST); + + /* Enable secure and non-secure transactions to bridges */ + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST); + writel(~0, SOCFPGA_NOC_FW_H2F_SCR_OFST + 4); + + writel(0x0007FFFF, &sysmgr_regs->ecc_intmask_set); } int arch_early_init_r(void) |