diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-07-31 12:58:06 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2019-08-09 23:15:01 +0200 |
| commit | 46c33166d16c622ea826e78d656c4587c10e43e4 (patch) | |
| tree | 1cefe9b829e89e12a3946e3c176a9835bec8b488 | |
| parent | 163bc1e4da425015000dd3f8f128aec994da9586 (diff) | |
net: sh_eth: Add R8A77980 V3H gether support
The R8A77980 V3H gether needs a few minor adjustments to the sh_eth
driver, add them to support ethernet on R8A77980.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| -rw-r--r-- | drivers/net/sh_eth.c | 15 | ||||
| -rw-r--r-- | drivers/net/sh_eth.h | 6 |
2 files changed, 16 insertions, 5 deletions
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index da79b766a6..485c4b71ad 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -374,10 +374,16 @@ static void sh_eth_write_hwaddr(struct sh_eth_info *port_info, static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, unsigned char *mac) { struct sh_eth_info *port_info = ð->port_info[eth->port]; + unsigned long edmr; /* Configure e-dmac registers */ - sh_eth_write(port_info, (sh_eth_read(port_info, EDMR) & ~EMDR_DESC_R) | - (EMDR_DESC | EDMR_EL), EDMR); + edmr = sh_eth_read(port_info, EDMR); + edmr &= ~EMDR_DESC_R; + edmr |= EMDR_DESC | EDMR_EL; +#if defined(CONFIG_R8A77980) + edmr |= EDMR_NBST; +#endif + sh_eth_write(port_info, edmr, EDMR); sh_eth_write(port_info, 0, EESIPR); sh_eth_write(port_info, 0, TRSCER); @@ -407,7 +413,7 @@ static void sh_eth_mac_regs_config(struct sh_eth_dev *eth, unsigned char *mac) #if defined(CONFIG_CPU_SH7734) || defined(CONFIG_R8A7740) sh_eth_write(port_info, CONFIG_SH_ETHER_SH7734_MII, RMII_MII); -#elif defined(CONFIG_RCAR_GEN2) +#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980) sh_eth_write(port_info, sh_eth_read(port_info, RMIIMR) | 0x1, RMIIMR); #endif } @@ -426,7 +432,7 @@ static int sh_eth_phy_regs_config(struct sh_eth_dev *eth) sh_eth_write(port_info, GECMR_100B, GECMR); #elif defined(CONFIG_CPU_SH7757) || defined(CONFIG_CPU_SH7752) sh_eth_write(port_info, 1, RTRATE); -#elif defined(CONFIG_RCAR_GEN2) +#elif defined(CONFIG_RCAR_GEN2) || defined(CONFIG_R8A77980) val = ECMR_RTM; #endif } else if (phy->speed == 10) { @@ -931,6 +937,7 @@ static const struct udevice_id sh_ether_ids[] = { { .compatible = "renesas,ether-r8a7791" }, { .compatible = "renesas,ether-r8a7793" }, { .compatible = "renesas,ether-r8a7794" }, + { .compatible = "renesas,gether-r8a77980" }, { } }; diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index e1bbd4913f..564cdaccb7 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -358,6 +358,9 @@ static const u16 sh_eth_offset_fast_sh4[SH_ETH_MAX_REGISTER_OFFSET] = { #elif defined(CONFIG_R7S72100) #define SH_ETH_TYPE_RZ #define BASE_IO_ADDR 0xE8203000 +#elif defined(CONFIG_R8A77980) +#define SH_ETH_TYPE_GETHER +#define BASE_IO_ADDR 0xE7400000 #endif /* @@ -374,6 +377,7 @@ enum EDSR_BIT { /* EDMR */ enum DMAC_M_BIT { + EDMR_NBST = 0x80, /* DMA transfer burst mode */ EDMR_DL1 = 0x20, EDMR_DL0 = 0x10, #if defined(SH_ETH_TYPE_GETHER) || defined(SH_ETH_TYPE_RZ) EDMR_SRST = 0x03, /* Receive/Send reset */ @@ -563,7 +567,7 @@ enum FELIC_MODE_BIT { ECMR_PRM = 0x00000001, #ifdef CONFIG_CPU_SH7724 ECMR_RTM = 0x00000010, -#elif defined(CONFIG_RCAR_GEN2) +#elif defined(CONFIG_RCAR_GEN2) || defined (CONFIG_R8A77980) ECMR_RTM = 0x00000004, #endif |