diff options
| author | Jon Loeliger <jdl@freescale.com> | 2006-09-29 09:34:35 -0500 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2006-09-29 09:34:35 -0500 |
| commit | 4bbd4537835f72b5c46ca6efb38143e431b3dbd5 (patch) | |
| tree | 37bf8ccee947a546bee1914d05e9b21919d10c27 | |
| parent | 504b5cd0e2e7b58c6265fb684a850a158c85e1b2 (diff) | |
| parent | f55df18187e7a45cb73fec4370d12135e6691ae1 (diff) | |
Merge branch 'mpc86xx'
| -rw-r--r-- | cpu/mpc86xx/spd_sdram.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/cpu/mpc86xx/spd_sdram.c b/cpu/mpc86xx/spd_sdram.c index 44b0d4133c..39da3cc535 100644 --- a/cpu/mpc86xx/spd_sdram.c +++ b/cpu/mpc86xx/spd_sdram.c @@ -466,6 +466,8 @@ spd_init(unsigned char i2c_address, unsigned int ddr_num, * are slower than the DDR module. */ busfreq = get_bus_freq(0) / 1000000; /* MHz */ + tCycle_ps = convert_bcd_tenths_to_cycle_time_ps(spd.clk_cycle3); + modfreq = 2 * 1000 * 1000 / tCycle_ps; if ((spd.mem_type == SPD_MEMTYPE_DDR2) && (busfreq < 266)) { printf("DDR: platform frequency too low for correct DDR2 controller operation\n"); |