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| author | Simon Glass <sjg@chromium.org> | 2017-05-31 17:57:14 -0600 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-06-09 13:39:32 -0600 |
| commit | 50a4886b3b8579a5d3dad337906de9b5a3fef6d1 (patch) | |
| tree | 9afc72e4d90b51537d4e31121144d22f046f9db2 | |
| parent | 10d602ac8b6f576d545e35a951e1a714de0158a3 (diff) | |
arm: Disable LPAE if not enabled
If CONFIG_ARMV7_LPAE is not defined we should make sure that the feature
is disabled. This can happen if U-Boot is chain-loaded from another boot
loader which does enable LPAE.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/arm/lib/cache-cp15.c | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index f293573601..cf852c061b 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -172,6 +172,15 @@ static inline void mmu_setup(void) : : "r" (MEMORY_ATTRIBUTES) : "memory"); } #elif defined(CONFIG_CPU_V7) + if (is_hyp()) { + /* Set HTCR to disable LPAE */ + asm volatile("mcr p15, 4, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } else { + /* Set TTBCR to disable LPAE */ + asm volatile("mcr p15, 0, %0, c2, c0, 2" + : : "r" (0) : "memory"); + } /* Set TTBR0 */ reg = gd->arch.tlb_addr & TTBR0_BASE_ADDR_MASK; #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH) |