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authorYangbo Lu <yangbo.lu@nxp.com>2019-10-31 18:54:21 +0800
committerPeng Fan <peng.fan@nxp.com>2019-11-05 11:21:24 +0800
commit5b05fc0310cd933acf76ee661577c6b07a95e684 (patch)
tree4665e9a01feea6d31d4f63634988a7619d6119f5
parent531ccd407c93347c1be81470e3604c3ef63e97bf (diff)
mmc: fsl_esdhc: fix voltage validation
Voltage validation should be done by CMD8. Current comparison between mmc_cfg voltages and host voltage capabilities is meaningless. So drop current comparison and let voltage validation is through CMD8. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
-rw-r--r--drivers/mmc/fsl_esdhc.c36
-rw-r--r--include/fsl_esdhc.h13
2 files changed, 17 insertions, 32 deletions
diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 7d7236cbfe..40fd6afc08 100644
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -684,7 +684,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
{
struct mmc_config *cfg;
struct fsl_esdhc *regs;
- u32 caps, voltage_caps;
+ u32 caps;
if (!priv)
return -EINVAL;
@@ -696,40 +696,24 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
memset(cfg, '\0', sizeof(*cfg));
#endif
- voltage_caps = 0;
caps = esdhc_read32(&regs->hostcapblt);
-
#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC135
- caps = caps & ~(ESDHC_HOSTCAPBLT_SRS |
- ESDHC_HOSTCAPBLT_VS18 | ESDHC_HOSTCAPBLT_VS30);
+ caps &= ~(HOSTCAPBLT_SRS | HOSTCAPBLT_VS18 | HOSTCAPBLT_VS30);
#endif
-
-/* T4240 host controller capabilities register should have VS33 bit */
#ifdef CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
- caps = caps | ESDHC_HOSTCAPBLT_VS33;
+ caps |= HOSTCAPBLT_VS33;
#endif
-
- if (caps & ESDHC_HOSTCAPBLT_VS18)
- voltage_caps |= MMC_VDD_165_195;
- if (caps & ESDHC_HOSTCAPBLT_VS30)
- voltage_caps |= MMC_VDD_29_30 | MMC_VDD_30_31;
- if (caps & ESDHC_HOSTCAPBLT_VS33)
- voltage_caps |= MMC_VDD_32_33 | MMC_VDD_33_34;
+ if (caps & HOSTCAPBLT_VS18)
+ cfg->voltages |= MMC_VDD_165_195;
+ if (caps & HOSTCAPBLT_VS30)
+ cfg->voltages |= MMC_VDD_29_30 | MMC_VDD_30_31;
+ if (caps & HOSTCAPBLT_VS33)
+ cfg->voltages |= MMC_VDD_32_33 | MMC_VDD_33_34;
cfg->name = "FSL_SDHC";
#if !CONFIG_IS_ENABLED(DM_MMC)
cfg->ops = &esdhc_ops;
#endif
-#ifdef CONFIG_SYS_SD_VOLTAGE
- cfg->voltages = CONFIG_SYS_SD_VOLTAGE;
-#else
- cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
-#endif
- if ((cfg->voltages & voltage_caps) == 0) {
- printf("voltage not supported by controller\n");
- return -1;
- }
-
if (priv->bus_width == 8)
cfg->host_caps = MMC_MODE_4BIT | MMC_MODE_8BIT;
else if (priv->bus_width == 4)
@@ -744,7 +728,7 @@ static int fsl_esdhc_init(struct fsl_esdhc_priv *priv,
cfg->host_caps &= ~MMC_MODE_4BIT;
}
- if (caps & ESDHC_HOSTCAPBLT_HSS)
+ if (caps & HOSTCAPBLT_HSS)
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
#ifdef CONFIG_ESDHC_DETECT_8_BIT_QUIRK
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 33dcbee53b..a015df1cec 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -156,12 +156,13 @@
#define BLKATTR_SIZE(x) (x & 0x1fff)
#define MAX_BLK_CNT 0x7fff /* so malloc will have enough room with 32M */
-#define ESDHC_HOSTCAPBLT_VS18 0x04000000
-#define ESDHC_HOSTCAPBLT_VS30 0x02000000
-#define ESDHC_HOSTCAPBLT_VS33 0x01000000
-#define ESDHC_HOSTCAPBLT_SRS 0x00800000
-#define ESDHC_HOSTCAPBLT_DMAS 0x00400000
-#define ESDHC_HOSTCAPBLT_HSS 0x00200000
+/* Host controller capabilities register */
+#define HOSTCAPBLT_VS18 0x04000000
+#define HOSTCAPBLT_VS30 0x02000000
+#define HOSTCAPBLT_VS33 0x01000000
+#define HOSTCAPBLT_SRS 0x00800000
+#define HOSTCAPBLT_DMAS 0x00400000
+#define HOSTCAPBLT_HSS 0x00200000
struct fsl_esdhc_cfg {
phys_addr_t esdhc_base;