Support for LinkStation / KuroBox HD and HG PPC models

This patch is based on the port by Mihai Georgian (see linkstation.c for
Copyright information) and implements support for LinkStation / KuroBox HD
and HG PPC models from Buffalo Technology, whereby HD is deactivated at
the moment, pending network driver fixing.

Notice to users: this is pretty much a barebone port. Support for network
on HG models is already in the U-Boot mainline, but you might also want
patches to switch fan / phy modes depending on the negotiated ethernet
parameters. This patch also doesn't support console switching, booting EM
mode, Buffalo specific ext2 magic number. So, if you want to use any of
those, you need additional patches. Otherwise this patche provides a fully
functional u-boot with a network console on your system.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>

9 files changed, 1267 insertions, 0 deletions

diff --git a/MAKEALL b/MAKEALL
index c982fe6179..8241f456b5 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -260,6 +260,7 @@ LIST_824x="		\
 	debris		\
 	eXalion		\
 	HIDDEN_DRAGON	\
+	linkstation_HGLAN	\
 	MOUSSE		\
 	MUSENKI		\
 	MVBLUE		\
diff --git a/Makefile b/Makefile
index b0ede98125..449a3cc668 100644
--- a/Makefile
+++ b/Makefile
@@ -1502,6 +1502,18 @@ HIDDEN_DRAGON_config: unconfig
 kvme080_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x kvme080 etin
 
+# HDLAN is broken ATM. Should be fixed as soon as hardware is available and as
+# time permits.
+#linkstation_HDLAN_config \
+# Remove this line when HDLAN is fixed
+linkstation_HGLAN_config: unconfig
+	@mkdir -p $(obj)include
+	@case $@ in \
+		*HGLAN*) echo "#define CONFIG_HGLAN 1" >$(obj)include/config.h; ;; \
+		*HDLAN*) echo "#define CONFIG_HLAN 1" >$(obj)include/config.h; ;; \
+	esac
+	@$(MKCONFIG) -n $@ -a linkstation ppc mpc824x linkstation
+
 MOUSSE_config: unconfig
 	@$(MKCONFIG) $(@:_config=) ppc mpc824x mousse
 
diff --git a/board/linkstation/Makefile b/board/linkstation/Makefile
new file mode 100644
index 0000000000..57c84de60e
--- /dev/null
+++ b/board/linkstation/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o ide.o hwctl.o avr.o
+
+$(LIB):	.depend $(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS) $(SOBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/linkstation/avr.c b/board/linkstation/avr.c
new file mode 100644
index 0000000000..68bc5450a6
--- /dev/null
+++ b/board/linkstation/avr.c
@@ -0,0 +1,293 @@
+/*
+ * avr.c
+ *
+ * AVR functions
+ *
+ * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <ns16550.h>
+#include <console.h>
+
+/* Button codes from the AVR */
+#define PWRR			0x20		/* Power button release	*/
+#define PWRP			0x21		/* Power button push	*/
+#define RESR			0x22		/* Reset button release	*/
+#define RESP			0x23		/* Reset button push	*/
+#define AVRINIT			0x33		/* Init complete	*/
+#define AVRRESET		0x31		/* Reset request	*/
+
+/* LED commands */
+#define PWRBLINKSTRT		'['		/* Blink power LED	*/
+#define PWRBLINKSTOP		'Z'		/* Solid power LED	*/
+#define HDDLEDON		'W'		/* HDD LED on 		*/
+#define HDDLEDOFF		'V'		/* HDD LED off		*/
+#define HDDBLINKSTRT		'Y'		/* HDD LED start blink	*/
+#define HDDBLINKSTOP		'X'		/* HDD LED stop blink	*/
+
+/* Timings for LEDs blinking to show choice */
+#define PULSETIME		250		/* msecs		*/
+#define LONGPAUSE		(5 * PULSETIME)
+
+/* Button press times */
+#define PUSHHOLD		1000		/* msecs		*/
+#define NOBUTTON		(6 * (LONGPAUSE+PULSETIME))
+
+/* Boot and console choices */
+#define MAX_BOOT_CHOICE		3
+
+static char *consoles[] = {
+	"serial",
+#if defined(CONFIG_NETCONSOLE)
+	"nc",
+#endif
+};
+#define MAX_CONS_CHOICE 	(sizeof(consoles)/sizeof(char *))
+
+#if !defined(CONFIG_NETCONSOLE)
+#define DEF_CONS_CHOICE		0
+#else
+#define DEF_CONS_CHOICE		1
+#endif
+
+#define perror(fmt, args...) printf("%s: " fmt, __FUNCTION__ , ##args)
+
+extern void miconCntl_SendCmd(unsigned char dat);
+extern void miconCntl_DisWDT(void);
+
+static int boot_stop;
+
+static int boot_choice = 1;
+static int cons_choice = DEF_CONS_CHOICE;
+
+static char envbuffer[16];
+
+void init_AVR_DUART (void)
+{
+	NS16550_t AVR_port = (NS16550_t) CFG_NS16550_COM2;
+	int clock_divisor = CFG_NS16550_CLK / 16 / 9600;
+
+	/*
+	 * AVR port init sequence taken from
+	 * the original Linkstation init code
+	 * Normal U-Boot serial reinit doesn't
+	 * work because the AVR uses even parity
+	 */
+	AVR_port->lcr = 0x00;
+	AVR_port->ier = 0x00;
+	AVR_port->lcr = LCR_BKSE;
+	AVR_port->dll = clock_divisor & 0xff;
+	AVR_port->dlm = (clock_divisor >> 8) & 0xff;
+	AVR_port->lcr = LCR_WLS_8 | LCR_PEN | LCR_EPS;
+	AVR_port->mcr = 0x00;
+	AVR_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR;
+
+	miconCntl_DisWDT();
+
+	boot_stop = 0;
+	miconCntl_SendCmd(PWRBLINKSTRT);
+}
+
+static inline int avr_tstc(void)
+{
+	return (NS16550_tstc((NS16550_t)CFG_NS16550_COM2));
+}
+
+static inline char avr_getc(void)
+{
+	return (NS16550_getc((NS16550_t)CFG_NS16550_COM2));
+}
+
+static int push_timeout(char button_code)
+{
+	ulong push_start = get_timer(0);
+	while (get_timer(push_start) <= PUSHHOLD)
+		if (avr_tstc() && avr_getc() == button_code)
+			return 0;
+	return 1;
+}
+
+static void next_boot_choice(void)
+{
+	ulong return_start;
+	ulong pulse_start;
+	int on_times;
+	int button_on;
+	int led_state;
+	char c;
+
+	button_on = 0;
+	return_start = get_timer(0);
+
+	on_times = boot_choice;
+	led_state = 0;
+	miconCntl_SendCmd(HDDLEDOFF);
+	pulse_start = get_timer(0);
+
+	while (get_timer(return_start) <= NOBUTTON || button_on) {
+		if (avr_tstc()) {
+			c = avr_getc();
+			if (c == PWRP)
+				button_on = 1;
+			else if (c == PWRR) {
+				button_on = 0;
+				return_start = get_timer(0);
+				if (++boot_choice > MAX_BOOT_CHOICE)
+					boot_choice = 1;
+				sprintf(envbuffer, "bootcmd%d", boot_choice);
+				if (getenv(envbuffer)) {
+					sprintf(envbuffer, "run bootcmd%d", boot_choice);
+					setenv("bootcmd", envbuffer);
+				}
+				on_times = boot_choice;
+				led_state = 1;
+				miconCntl_SendCmd(HDDLEDON);
+				pulse_start = get_timer(0);
+			} else {
+				perror("Unexpected code: 0x%02X\n", c);
+			}
+		}
+		if (on_times && get_timer(pulse_start) > PULSETIME) {
+			if (led_state == 1) {
+				--on_times;
+				led_state = 0;
+				miconCntl_SendCmd(HDDLEDOFF);
+			} else {
+				led_state = 1;
+				miconCntl_SendCmd(HDDLEDON);
+			}
+			pulse_start = get_timer(0);
+		}
+		if (!on_times && get_timer(pulse_start) > LONGPAUSE) {
+			on_times = boot_choice;
+			led_state = 1;
+			miconCntl_SendCmd(HDDLEDON);
+			pulse_start = get_timer(0);
+		}
+	}
+	if (led_state)
+		miconCntl_SendCmd(HDDLEDOFF);
+}
+
+void next_cons_choice(int console)
+{
+	ulong return_start;
+	ulong pulse_start;
+	int on_times;
+	int button_on;
+	int led_state;
+	char c;
+
+	button_on = 0;
+	cons_choice = console;
+	return_start = get_timer(0);
+
+	on_times = cons_choice+1;
+	led_state = 1;
+	miconCntl_SendCmd(HDDLEDON);
+	pulse_start = get_timer(0);
+
+	while (get_timer(return_start) <= NOBUTTON || button_on) {
+		if (avr_tstc()) {
+			c = avr_getc();
+			if (c == RESP)
+				button_on = 1;
+			else if (c == RESR) {
+				button_on = 0;
+				return_start = get_timer(0);
+				cons_choice = (cons_choice + 1) % MAX_CONS_CHOICE;
+				console_assign(stdin, consoles[cons_choice]);
+				console_assign(stdout, consoles[cons_choice]);
+				console_assign(stderr, consoles[cons_choice]);
+				on_times = cons_choice+1;
+				led_state = 0;
+				miconCntl_SendCmd(HDDLEDOFF);
+				pulse_start = get_timer(0);
+			} else {
+				perror("Unexpected code: 0x%02X\n", c);
+			}
+		}
+		if (on_times && get_timer(pulse_start) > PULSETIME) {
+			if (led_state == 0) {
+				--on_times;
+				led_state = 1;
+				miconCntl_SendCmd(HDDLEDON);
+			} else {
+				led_state = 0;
+				miconCntl_SendCmd(HDDLEDOFF);
+			}
+			pulse_start = get_timer(0);
+		}
+		if (!on_times && get_timer(pulse_start) > LONGPAUSE) {
+			on_times = cons_choice+1;
+			led_state = 0;
+			miconCntl_SendCmd(HDDLEDOFF);
+			pulse_start = get_timer(0);
+		}
+	}
+	if (led_state);
+	miconCntl_SendCmd(HDDLEDOFF);
+}
+
+int avr_input(void)
+{
+	char avr_button;
+
+	if (!avr_tstc())
+		return 0;
+
+	avr_button = avr_getc();
+	switch (avr_button) {
+	case PWRP:
+		if (push_timeout(PWRR)) {
+			/* Timeout before power button release */
+			boot_stop = ~boot_stop;
+			if (boot_stop)
+				miconCntl_SendCmd(PWRBLINKSTOP);
+			else
+				miconCntl_SendCmd(PWRBLINKSTRT);
+			/* Wait for power button release */
+			while (avr_getc() != PWRR)
+				;
+		} else
+			/* Power button released */
+			next_boot_choice();
+		break;
+	case RESP:
+		/* Wait for Reset button release */
+		while (avr_getc() != RESR)
+			;
+		next_cons_choice(cons_choice);
+		break;
+	case AVRINIT:
+		return 0;
+	default:
+		perror("Unexpected code: 0x%02X\n", avr_button);
+		return 0;
+	}
+	if (boot_stop)
+		return (-3);
+	else
+		return (-2);
+}
+
+void avr_StopBoot(void)
+{
+	boot_stop = ~0;
+	miconCntl_SendCmd(PWRBLINKSTOP);
+}
diff --git a/board/linkstation/config.mk b/board/linkstation/config.mk
new file mode 100644
index 0000000000..bdf611dc2b
--- /dev/null
+++ b/board/linkstation/config.mk
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2001-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+# LinkStation/LinkStation-HG:
+#
+#       Valid values for TEXT_BASE are:
+#
+#	Standard configuration - all models
+#       0xFFF00000   boot from flash
+#
+#	Test configuration (boot from RAM using uloader.o)
+#	LinkStation HD-HLAN and KuroBox Standard
+#       0x03F00000   boot from RAM
+#	LinkStation HD-HGLAN and KuroBox HG
+#       0x07F00000   boot from RAM
+#
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+# For flash image - all models
+TEXT_BASE = 0xFFF00000
+# For RAM image
+# HLAN and LAN
+#TEXT_BASE = 0x03F00000
+# HGLAN and HGTL
+#TEXT_BASE = 0x07F00000
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
diff --git a/board/linkstation/hwctl.c b/board/linkstation/hwctl.c
new file mode 100644
index 0000000000..9db128a83f
--- /dev/null
+++ b/board/linkstation/hwctl.c
@@ -0,0 +1,135 @@
+/*
+ * hwctl.c
+ *
+ * LinkStation HW Control Driver
+ *
+ * Copyright (C) 2001-2004  BUFFALO INC.
+ *
+ * This software may be used and distributed according to the terms of
+ * the GNU General Public License (GPL), incorporated herein by reference.
+ * Drivers based on or derived from this code fall under the GPL and must
+ * retain the authorship, copyright and license notice.  This file is not
+ * a complete program and may only be used when the entire operating
+ * system is licensed under the GPL.
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+
+#define mdelay(n)	udelay((n)*1000)
+
+#define AVR_PORT CFG_NS16550_COM2
+
+/* 2005.5.10 BUFFALO add */
+/*--------------------------------------------------------------*/
+static inline void miconCntl_SendUart(unsigned char dat)
+{
+	out_8((char *)AVR_PORT, dat);
+	mdelay(1);
+}
+
+/*--------------------------------------------------------------*/
+void miconCntl_SendCmd(unsigned char dat)
+{
+	int i;
+
+	for (i=0; i<4; i++){
+		miconCntl_SendUart(dat);
+	}
+}
+
+/*--------------------------------------------------------------*/
+void miconCntl_FanLow(void)
+{
+#ifdef CONFIG_HTGL
+	miconCntl_SendCmd(0x5C);
+#endif
+}
+
+/*--------------------------------------------------------------*/
+void miconCntl_FanHigh(void)
+{
+#ifdef CONFIG_HTGL
+	miconCntl_SendCmd(0x5D);
+#endif
+}
+
+/*--------------------------------------------------------------*/
+/* 1000Mbps */
+void miconCntl_Eth1000M(int up)
+{
+#ifdef CONFIG_HTGL
+	if (up)
+		miconCntl_SendCmd(0x93);
+	else
+		miconCntl_SendCmd(0x92);
+#else
+	if (up)
+		miconCntl_SendCmd(0x5D);
+	else
+		miconCntl_SendCmd(0x5C);
+#endif
+}
+
+/*--------------------------------------------------------------*/
+/* 100Mbps */
+void miconCntl_Eth100M(int up)
+{
+#ifdef CONFIG_HTGL
+	if (up)
+		miconCntl_SendCmd(0x91);
+	else
+		miconCntl_SendCmd(0x90);
+#else
+	if (up)
+		miconCntl_SendCmd(0x5C);
+#endif
+}
+
+/*--------------------------------------------------------------*/
+/* 10Mbps */
+void miconCntl_Eth10M(int up)
+{
+#ifdef CONFIG_HTGL
+	if (up)
+		miconCntl_SendCmd(0x8F);
+	else
+		miconCntl_SendCmd(0x8E);
+#else
+	if (up)
+		miconCntl_SendCmd(0x5C);
+#endif
+}
+
+/*--------------------------------------------------------------*/
+/*  */
+void miconCntl_5f(void)
+{
+	miconCntl_SendCmd(0x5F);
+	mdelay(100);
+}
+
+/*--------------------------------------------------------------*/
+/* "reboot start" signal */
+void miconCntl_Reboot(void)
+{
+	miconCntl_SendCmd(0x43);
+}
+
+/*--------------------------------------------------------------*/
+/* Disable watchdog timer */
+void miconCntl_DisWDT(void)
+{
+	miconCntl_SendCmd(0x41); /* A */
+	miconCntl_SendCmd(0x46); /* F */
+	miconCntl_SendCmd(0x4A); /* J */
+	miconCntl_SendCmd(0x3E); /* > */
+	miconCntl_SendCmd(0x56); /* V */
+	miconCntl_SendCmd(0x3E); /* > */
+	miconCntl_SendCmd(0x5A); /* Z */
+	miconCntl_SendCmd(0x56); /* V */
+	miconCntl_SendCmd(0x4B); /* K */
+}
diff --git a/board/linkstation/ide.c b/board/linkstation/ide.c
new file mode 100644
index 0000000000..37d9b57fad
--- /dev/null
+++ b/board/linkstation/ide.c
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+/* ide.c - ide support functions */
+
+
+#include <common.h>
+
+#ifdef CONFIG_CMD_IDE
+#include <ata.h>
+#include <ide.h>
+#include <pci.h>
+
+#define IT8212_PCI_CpuCONTROL		0x5e
+#define IT8212_PCI_PciModeCONTROL	0x50
+#define IT8212_PCI_IdeIoCONFIG		0x40
+#define IT8212_PCI_IdeBusSkewCONTROL	0x4c
+#define IT8212_PCI_IdeDrivingCURRENT	0x42
+
+extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
+extern struct pci_controller hose;
+
+int ide_preinit (void)
+{
+	int status;
+	pci_dev_t devbusfn;
+	int l;
+
+	status = 1;
+	for (l = 0; l < CFG_IDE_MAXBUS; l++) {
+		ide_bus_offset[l] = -ATA_STATUS;
+	}
+	devbusfn = pci_find_device(PCI_VENDOR_ID_CMD, PCI_DEVICE_ID_SII_680, 0);
+	if (devbusfn == -1)
+		devbusfn = pci_find_device(PCI_VENDOR_ID_ITE,PCI_DEVICE_ID_ITE_8212,0);
+	if (devbusfn != -1) {
+		status = 0;
+
+		pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
+							   (u32 *) &ide_bus_offset[0]);
+		ide_bus_offset[0] &= 0xfffffffe;
+		ide_bus_offset[0] = pci_hose_bus_to_phys(&hose,
+							 ide_bus_offset[0] & 0xfffffffe,
+							 PCI_REGION_IO);
+		pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_2,
+				      (u32 *) &ide_bus_offset[1]);
+		ide_bus_offset[1] &= 0xfffffffe;
+		ide_bus_offset[1] = pci_hose_bus_to_phys(&hose,
+							 ide_bus_offset[1] & 0xfffffffe,
+							 PCI_REGION_IO);
+	}
+
+	if (pci_find_device (PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8212, 0) != -1) {
+		pci_write_config_byte(devbusfn, IT8212_PCI_CpuCONTROL, 0x01);
+		pci_write_config_byte(devbusfn, IT8212_PCI_PciModeCONTROL, 0x00);
+		pci_write_config_word(devbusfn, PCI_COMMAND, 0x0047);
+#ifdef CONFIG_IT8212_SECONDARY_ENABLE
+		pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0xA0F3);
+#else
+		pci_write_config_word(devbusfn, IT8212_PCI_IdeIoCONFIG, 0x8031);
+#endif
+		pci_write_config_dword(devbusfn, IT8212_PCI_IdeBusSkewCONTROL, 0x02040204);
+/* __LS_COMMENT__ BUFFALO changed 2004.11.10  changed for EMI */
+        pci_write_config_byte(devbusfn, IT8212_PCI_IdeDrivingCURRENT, 0x36); /* 10mA */
+/*      pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x09); */ /* 4mA */
+/*      pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x12); */ /* 6mA */
+/*      pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x24); */ /* 6mA,2mA */
+/*      pci_write_config_byte(dev, IT8212_PCI_IdeDrivingCURRENT, 0x2D); */ /* 8mA,4mA */
+        pci_write_config_byte(devbusfn, PCI_LATENCY_TIMER, 0x00);
+	}
+
+	return (status);
+}
+
+void ide_set_reset (int flag) {
+	return;
+}
+
+#endif /* CONFIG_CMD_IDE */
diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c
new file mode 100644
index 0000000000..f6bc0a958d
--- /dev/null
+++ b/board/linkstation/linkstation.c
@@ -0,0 +1,130 @@
+/*
+ * linkstation.c
+ *
+ * Misc LinkStation specific functions
+ *
+ * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <version.h>
+#include <common.h>
+#include <mpc824x.h>
+#include <asm/io.h>
+#include <ns16550.h>
+
+#ifdef CONFIG_PCI
+#include <pci.h>
+#endif
+
+extern void init_AVR_DUART(void);
+
+int checkboard (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	char *p;
+	bd_t *bd = gd->bd;
+
+	init_AVR_DUART();
+
+	if ((p = getenv ("console_nr")) != NULL) {
+		unsigned long con_nr = simple_strtoul (p, NULL, 10) & 3;
+
+		bd->bi_baudrate &= ~3;
+		bd->bi_baudrate |= con_nr & 3;
+	}
+	return 0;
+}
+
+long int initdram (int board_type)
+{
+	return (get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE));
+}
+
+/*
+ * Initialize PCI Devices
+ */
+#ifdef CONFIG_PCI
+
+#ifndef CONFIG_PCI_PNP
+
+static struct pci_config_table pci_linkstation_config_table[] = {
+	/* vendor, device, class */
+	/* bus, dev, func */
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x0b, 0,		/* AN983B or RTL8110S  */
+								/* ethernet controller */
+	  pci_cfgfunc_config_device, { PCI_ETH_IOADDR,
+				       PCI_ETH_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x0c, 0,		/* SII680 or IT8211AF */
+								/* ide controller     */
+	  pci_cfgfunc_config_device, { PCI_IDE_IOADDR,
+				       PCI_IDE_MEMADDR,
+				       PCI_COMMAND_IO |
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x0e, 0,		/* D720101 USB controller, 1st USB 1.1 */
+	  pci_cfgfunc_config_device, { PCI_USB0_IOADDR,
+				       PCI_USB0_MEMADDR,
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x0e, 1,		/* D720101 USB controller, 2nd USB 1.1 */
+	  pci_cfgfunc_config_device, { PCI_USB1_IOADDR,
+				       PCI_USB1_MEMADDR,
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+	  PCI_ANY_ID, 0x0e, 2,		/* D720101 USB controller, USB 2.0 */
+	  pci_cfgfunc_config_device, { PCI_USB2_IOADDR,
+				       PCI_USB2_MEMADDR,
+				       PCI_COMMAND_MEMORY |
+				       PCI_COMMAND_MASTER }},
+	{ }
+};
+#endif
+
+struct pci_controller hose = {
+#ifndef CONFIG_PCI_PNP
+	config_table:pci_linkstation_config_table,
+#endif
+};
+
+void pci_init_board (void)
+{
+	pci_mpc824x_init (&hose);
+
+	/* Reset USB 1.1 */
+	/* Haven't seen any change without these on a HG, maybe it is
+	 * needed on other models */
+	out_le32((volatile unsigned*)(PCI_USB0_MEMADDR + 8), 1);
+	out_le32((volatile unsigned*)(PCI_USB1_MEMADDR + 8), 1);
+}
+#endif /* CONFIG_PCI */
+
+#define UART_DCR       0x80004511
+int board_early_init_f (void)
+{
+	/* set DUART mode */
+	out_8((volatile u8*)UART_DCR, 1);
+	return 0;
+}
diff --git a/include/configs/linkstation.h b/include/configs/linkstation.h
new file mode 100644
index 0000000000..518186b08c
--- /dev/null
+++ b/include/configs/linkstation.h
@@ -0,0 +1,507 @@
+/*
+ * Copyright (C) 2006 Mihai Georgian <u-boot@linuxnotincluded.org.uk>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#if 0
+#define DEBUG
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_F 1	/* Call board_early_init_f	*/
+
+/*-----------------------------------------------------------------------
+ * User configurable settings:
+ *   Mandatory settings:
+ *     CONFIG_IPADDR_LS		- the IP address of the LinkStation
+ *     CONFIG_SERVERIP_LS	- the address of the server for NFS/TFTP/DHCP/BOOTP
+ *   Optional settins:
+ *     CONFIG_NCIP_LS		- the adress of the computer running net console
+ *							  if not configured, it will be set to
+ *							  CONFIG_SERVERIP_LS
+ */
+
+
+#define CONFIG_IPADDR_LS	192.168.11.150
+#define CONFIG_SERVERIP_LS	192.168.11.149
+
+#if !defined(CONFIG_IPADDR_LS) || !defined(CONFIG_SERVERIP_LS)
+#error Both CONFIG_IPADDR_LS and CONFIG_SERVERIP_LS must be defined
+#endif
+
+#if !defined(CONFIG_NCIP_LS)
+#define CONFIG_NCIP_LS		CONFIG_SERVERIP_LS
+#endif
+
+/*----------------------------------------------------------------------
+ * DO NOT CHANGE ANYTHING BELOW, UNLESS YOU KNOW WHAT YOU ARE DOING
+ *---------------------------------------------------------------------*/
+
+#define CONFIG_MPC8245		1
+#define CONFIG_LINKSTATION	1
+
+/*---------------------------------------
+ * Supported models
+ *
+ * LinkStation HDLAN /KuroBox Standard (CONFIG_HLAN)
+ * LinkStation old model               (CONFIG_LAN) - totally untested
+ * LinkStation HGLAN / KuroBox HG      (CONFIG_HGLAN)
+ *
+ * Models not supported yet
+ * TeraStatin                          (CONFIG_HTGL)
+ */
+
+#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
+#define CONFIG_IDENT_STRING		" LinkStation / KuroBox"
+#elif defined(CONFIG_HGLAN)
+#define CONFIG_IDENT_STRING		" LinkStation HG / KuroBox HG"
+#elif defined(CONFIG_HTGL)
+#define CONFIG_IDENT_STRING		" TeraStation"
+#else
+#error No LinkStation model defined
+#endif
+
+#define CONFIG_BOOTDELAY	5
+#define CONFIG_ZERO_BOOTDELAY_CHECK
+#undef CONFIG_BOOT_RETRY_TIME
+
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT		"Boot in %02d seconds ('s' to stop)..."
+#define CONFIG_AUTOBOOT_STOP_STR	"s"
+
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EXT2
+
+#define CONFIG_BOOTP_MASK	CONFIG_BOOTP_ALL
+
+#define CONFIG_OF_LIBFDT	1
+
+#define OF_CPU			"PowerPC,603e"
+#define OF_SOC			"soc10x@80000000"
+#define OF_STDOUT_PATH		"/soc10x/serial@80004600"
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <config_cmd_default.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP				/* undef to save memory		*/
+#define CFG_PROMPT		"=> "		/* Monitor Command Prompt	*/
+#define CFG_CBSIZE		256		/* Console I/O Buffer Size	*/
+
+#define CFG_PBSIZE		(CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS		16		/* Max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+#define CFG_LOAD_ADDR		0x00800000	/* Default load address: 8 MB	*/
+
+#define CONFIG_BOOTCOMMAND  	"run bootcmd1"
+#define CONFIG_BOOTARGS		"root=/dev/sda1 console=ttyS1,57600 netconsole=@192.168.1.7/eth0,@192.168.1.1/00:50:BF:A4:59:71 rtc-rs5c372.probe=0,0x32 debug"
+#define CONFIG_NFSBOOTCOMMAND  	"bootp;run nfsargs;bootm"
+
+#define CFG_CONSOLE_IS_IN_ENV
+
+#define XMK_STR(x)		#x
+#define MK_STR(x)		XMK_STR(x)
+
+#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
+#define UBFILE			"share/u-boot/u-boot-hd.flash.bin"
+#elif defined(CONFIG_HGLAN)
+#define UBFILE			"share/u-boot/u-boot-hg.flash.bin"
+#elif defined(CONFIG_HTGL)
+#define UBFILE			"share/u-boot/u-boot-ht.flash.bin"
+#else
+#error No LinkStation model defined
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS						\
+	"autoload=no\0"								\
+	"stdin=nc\0"								\
+	"stdout=nc\0"								\
+	"stderr=nc\0"								\
+	"ipaddr="MK_STR(CONFIG_IPADDR_LS)"\0"					\
+	"netmask=255.255.255.0\0"						\
+	"serverip="MK_STR(CONFIG_SERVERIP_LS)"\0"				\
+	"ncip="MK_STR(CONFIG_NCIP_LS)"\0"					\
+	"netretry=no\0"								\
+	"nc=setenv stdin nc;setenv stdout nc;setenv stderr nc\0"		\
+	"ser=setenv stdin serial;setenv stdout serial;setenv stderr serial\0"	\
+	"ldaddr=800000\0"							\
+	"hdpart=0:1\0"								\
+	"hdfile=boot/uImage\0"							\
+	"hdload=echo Loading ${hdpart}:${hdfile};ext2load ide ${hdpart} ${ldaddr} ${hdfile};ext2load ide ${hdpart} 7f0000 boot/kuroboxHG.dtb\0"	\
+	"boothd=setenv bootargs " CONFIG_BOOTARGS ";bootm ${ldaddr} - 7f0000\0"	\
+	"hdboot=run hdload;run boothd\0"					\
+	"flboot=setenv bootargs root=/dev/hda1;bootm ffc00000\0"		\
+	"emboot=setenv bootargs root=/dev/ram0;bootm ffc00000\0"		\
+	"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} "	\
+	"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0"	\
+	"bootretry=30\0"							\
+	"bootcmd1=run hdboot;run flboot\0"					\
+	"bootcmd2=run flboot\0"							\
+	"bootcmd3=run emboot\0"							\
+	"writeng=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4e474e47 1;cp.b 800000 fff70000 4\0" \
+	"writeok=protect off fff70000 fff7ffff;era fff70000 fff7ffff;mw.l 800000 4f4b4f4b 1;cp.b 800000 fff70000 4\0" \
+	"ubpart=0:3\0"								\
+	"ubfile="UBFILE"\0"							\
+	"ubload=echo Loading ${ubpart}:${ubfile};ext2load ide ${ubpart} ${ldaddr} ${ubfile}\0" \
+	"ubsaddr=fff00000\0"							\
+	"ubeaddr=fff2ffff\0"							\
+	"ubflash=protect off ${ubsaddr} ${ubeaddr};era ${ubsaddr} ${ubeaddr};cp.b ${ldaddr} ${ubsaddr} ${filesize};cmp.b ${ldaddr} ${ubsaddr} ${filesize}\0" \
+	"upgrade=run ubload ubflash\0"
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ */
+#define CONFIG_PCI
+/* Verified: CONFIG_PCI_PNP doesn't work */
+#undef CONFIG_PCI_PNP
+#define CONFIG_PCI_SCAN_SHOW
+
+#ifndef CONFIG_PCI_PNP
+/* Keep the following defines in sync with the BAT mappings */
+
+#define PCI_ETH_IOADDR      0xbfff00
+#define PCI_ETH_MEMADDR     0xbffffc00
+#define PCI_IDE_IOADDR      0xbffed0
+#define PCI_IDE_MEMADDR     0xbffffb00
+#define PCI_USB0_IOADDR     0
+#define PCI_USB0_MEMADDR    0xbfffe000
+#define PCI_USB1_IOADDR     0
+#define PCI_USB1_MEMADDR    0xbfffd000
+#define PCI_USB2_IOADDR     0
+#define PCI_USB2_MEMADDR    0xbfffcf00
+
+#endif
+
+/*-----------------------------------------------------------------------
+ * Ethernet stuff
+ */
+#define CONFIG_NET_MULTI
+
+#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
+#define CONFIG_TULIP
+#define CONFIG_TULIP_USE_IO
+#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
+#define CONFIG_RTL8169
+#endif
+
+#define CONFIG_NET_RETRY_COUNT		5
+
+#define CONFIG_NETCONSOLE
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE	    	0x00000000
+
+#define CFG_FLASH_BASE      	0xFFC00000
+#define CFG_FLASH_SIZE		0x00400000
+#define CFG_MONITOR_BASE    	TEXT_BASE
+
+#define CFG_RESET_ADDRESS   	0xFFF00100
+#define CFG_EUMB_ADDR	    	0x80000000
+#define CFG_PCI_MEM_ADDR	0xB0000000
+#define CFG_MISC_REGION_ADDR	0xFE000000
+
+#define CFG_MONITOR_LEN     	0x00040000	/* 256 kB			*/
+#define CFG_MALLOC_LEN      	(512 << 10)	/* Reserve some kB for malloc()	*/
+
+#define CFG_MEMTEST_START   	0x00100000	/* memtest works on		*/
+#define CFG_MEMTEST_END	    	0x00800000	/* 1M ... 8M in DRAM		*/
+
+/* Maximum amount of RAM */
+#if defined(CONFIG_HLAN) || defined(CONFIG_LAN)
+#define CFG_MAX_RAM_SIZE    	0x04000000	/* 64MB of SDRAM  */
+#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
+#define CFG_MAX_RAM_SIZE    	0x08000000	/* 128MB of SDRAM */
+#else
+#error Unknown LinkStation type
+#endif
+
+/*-----------------------------------------------------------------------
+ * Change TEXT_BASE in bord/linkstation/config.mk to get a RAM build
+ *
+ * RAM based builds are for testing purposes. A Linux module, uloader.o,
+ * exists to load U-Boot and pass control to it
+ *
+ * Always do "make clean" after changing the build type
+ */
+#if CFG_MONITOR_BASE < CFG_FLASH_BASE
+#define CFG_RAMBOOT
+#endif
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area
+ */
+#if 1 /* RAM is available when the first C function is called */
+#define CFG_INIT_RAM_ADDR	(CFG_SDRAM_BASE + CFG_MAX_RAM_SIZE - 0x1000)
+#else
+#define CFG_INIT_RAM_ADDR	0x40000000
+#endif
+#define CFG_INIT_RAM_END	0x1000
+#define CFG_GBL_DATA_SIZE	128
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+
+/*----------------------------------------------------------------------
+ * Serial configuration
+ */
+#define CONFIG_CONS_INDEX	1
+#define CONFIG_BAUDRATE		57600
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+
+#define CFG_NS16550_REG_SIZE	1
+
+#define CFG_NS16550_CLK		get_bus_freq(0)
+
+#define CFG_NS16550_COM1	(CFG_EUMB_ADDR + 0x4600)	/* Console port	*/
+#define CFG_NS16550_COM2	(CFG_EUMB_ADDR + 0x4500)	/* AVR port	*/
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ * For the detail description refer to the MPC8245 user's manual.
+ *
+ * Unless indicated otherwise, the values are
+ * taken from the orignal Linkstation boot code
+ *
+ * Most of the low level configuration setttings are normally used
+ * in cpu/mpc824x/cpu_init.c which is NOT used by this implementation.
+ * Low level initialisation is done in board/linkstation/early_init.S
+ * The values below are included for reference purpose only
+ */
+
+/* FIXME: 32.768 MHz is the crystal frequency but */
+/* the real frequency is lower by about 0.75%     */
+#define CONFIG_SYS_CLK_FREQ	32768000
+#define CFG_HZ			1000
+
+/* Bit-field values for MCCR1.  */
+#define CFG_ROMNAL      0
+#define CFG_ROMFAL      11
+
+#define CFG_BANK0_ROW	2       /* Only bank 0 used: 13 x n x 4 */
+#define CFG_BANK1_ROW	0
+#define CFG_BANK2_ROW	0
+#define CFG_BANK3_ROW	0
+#define CFG_BANK4_ROW	0
+#define CFG_BANK5_ROW	0
+#define CFG_BANK6_ROW	0
+#define CFG_BANK7_ROW	0
+
+/* Bit-field values for MCCR2.  */
+#define CFG_TSWAIT      0
+#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
+#define CFG_REFINT      0x15e0
+#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
+#define CFG_REFINT      0x1580
+#endif
+
+/* Burst To Precharge. Bits of this value go to MCCR3 and MCCR4. */
+#define CFG_BSTOPRE	0x91c
+
+/* Bit-field values for MCCR3.  */
+#define CFG_REFREC      7
+
+/* Bit-field values for MCCR4.  */
+#define CFG_PRETOACT		2
+#define CFG_ACTTOPRE		2	/* Original value was 2	*/
+#define CFG_ACTORW		2
+#if defined(CONFIG_LAN) || defined(CONFIG_HLAN)
+#define CFG_SDMODE_CAS_LAT	2	/* For 100MHz bus	*/
+/*#define CFG_SDMODE_BURSTLEN	3*/
+#elif defined(CONFIG_HGLAN) || defined(CONFIG_HTGL)
+#define CFG_SDMODE_CAS_LAT	3	/* For 133MHz bus	*/
+/*#define CFG_SDMODE_BURSTLEN	2*/
+#endif
+#define CFG_REGISTERD_TYPE_BUFFER 1
+#define CFG_EXTROM		1	/* Original setting but there is no EXTROM */
+#define CFG_REGDIMM		0
+#define CFG_DBUS_SIZE2		1
+#define CFG_SDMODE_WRAP		0
+
+#define CFG_PGMAX		0x32	/* All boards use this setting. Original 0x92 */
+#define CFG_SDRAM_DSCD		0x30
+
+/* Memory bank settings.
+ * Only bits 20-29 are actually used from these vales to set the
+ * start/end addresses. The upper two bits will always be 0, and the lower
+ * 20 bits will be 0x00000 for a start address, or 0xfffff for an end
+ * address. Refer to the MPC8240 book.
+ */
+
+#define CFG_BANK0_START	    0x00000000
+#define CFG_BANK0_END	    (CFG_MAX_RAM_SIZE - 1)
+#define CFG_BANK0_ENABLE    1
+#define CFG_BANK1_START     0x3ff00000
+#define CFG_BANK1_END       0x3fffffff
+#define CFG_BANK1_ENABLE    0
+#define CFG_BANK2_START     0x3ff00000
+#define CFG_BANK2_END       0x3fffffff
+#define CFG_BANK2_ENABLE    0
+#define CFG_BANK3_START     0x3ff00000
+#define CFG_BANK3_END       0x3fffffff
+#define CFG_BANK3_ENABLE    0
+#define CFG_BANK4_START     0x3ff00000
+#define CFG_BANK4_END       0x3fffffff
+#define CFG_BANK4_ENABLE    0
+#define CFG_BANK5_START     0x3ff00000
+#define CFG_BANK5_END       0x3fffffff
+#define CFG_BANK5_ENABLE    0
+#define CFG_BANK6_START     0x3ff00000
+#define CFG_BANK6_END       0x3fffffff
+#define CFG_BANK6_ENABLE    0
+#define CFG_BANK7_START     0x3ff00000
+#define CFG_BANK7_END       0x3fffffff
+#define CFG_BANK7_ENABLE    0
+
+#define CFG_ODCR	    0x15
+
+/*----------------------------------------------------------------------
+ * Initial BAT mappings
+ */
+
+/* NOTES:
+ * 1) GUARDED and WRITETHROUGH not allowed in IBATS
+ * 2) CACHEINHIBIT and WRITETHROUGH not allowed together in same BAT
+ */
+
+/* SDRAM */
+#define CFG_IBAT0L	(CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U	(CFG_SDRAM_BASE | BATU_BL_128M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT0L	CFG_IBAT0L
+#define CFG_DBAT0U	CFG_IBAT0U
+
+/* EUMB: 1MB of address space */
+#define CFG_IBAT1L	(CFG_EUMB_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
+#define CFG_IBAT1U	(CFG_EUMB_ADDR | BATU_BL_1M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT1L	(CFG_IBAT1L | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT1U	CFG_IBAT1U
+
+/* PCI Mem: 256MB of address space */
+#define CFG_IBAT2L	(CFG_PCI_MEM_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
+#define CFG_IBAT2U	(CFG_PCI_MEM_ADDR | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT2L	(CFG_IBAT2L | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT2U	CFG_IBAT2U
+
+/* PCI and local ROM/Flash: last 32MB of address space */
+#define CFG_IBAT3L	(CFG_MISC_REGION_ADDR | BATL_PP_10 | BATL_CACHEINHIBIT)
+#define CFG_IBAT3U	(CFG_MISC_REGION_ADDR | BATU_BL_32M | BATU_VS | BATU_VP)
+
+#define CFG_DBAT3L	(CFG_IBAT3L | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT3U	CFG_IBAT3U
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ *
+ * FIXME: This doesn't appear to be true for the newer kernels
+ * which map more that 8 MB
+ */
+#define CFG_BOOTMAPSZ	(8 << 20)	/* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_FLASH_CFI			/* The flash is CFI compatible	*/
+#define CFG_FLASH_CFI_DRIVER		/* Use common CFI driver	*/
+
+#undef  CFG_FLASH_PROTECTION
+#define CFG_FLASH_BANKS_LIST	{ CFG_FLASH_BASE }
+#define CFG_MAX_FLASH_BANKS	1	/* Max number of flash banks		*/
+#define CFG_MAX_FLASH_SECT	72	/* Max number of sectors per flash	*/
+
+#define CFG_FLASH_ERASE_TOUT	12000
+#define CFG_FLASH_WRITE_TOUT	1000
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1	/* use buffered writes (20x faster)	*/
+
+#define CFG_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */
+#define CFG_FLASH_QUIET_TEST	1	/* don't warn upon unknown flash	*/
+
+#define CFG_ENV_IS_IN_FLASH
+/*
+ * The original LinkStation flash organisation uses
+ * 448 kB (0xFFF00000 - 0xFFF6FFFF) for the boot loader
+ * We use the last sector of this area to store the environment
+ * which leaves max. 384 kB for the U-Boot itself
+ */
+#define CFG_ENV_ADDR		0xFFF60000
+#define CFG_ENV_SIZE		0x00010000
+#define CFG_ENV_SECT_SIZE	0x00010000
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE	32
+#ifdef CONFIG_CMD_KGDB
+#define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
+#endif
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA definitions
+ */
+#undef  CONFIG_IDE_LED				/* No IDE LED			*/
+#define CONFIG_IDE_RESET			/* no reset for ide supported	*/
+#define CONFIG_IDE_PREINIT			/* check for units		*/
+#define CONFIG_LBA48				/* 48 bit LBA supported		*/
+
+#if defined(CONFIG_LAN) || defined(CONFIG_HLAN) || defined(CONFIG_HGLAN)
+#define CFG_IDE_MAXBUS		1		/* Scan only 1 IDE bus		*/
+#define CFG_IDE_MAXDEVICE	1		/* Only 1 drive per IDE bus	*/
+#elif defined(CONFIG_HGTL)
+#define CFG_IDE_MAXBUS		2		/* Max. 2 IDE busses		*/
+#define CFG_IDE_MAXDEVICE	2		/* max. 2 drives per IDE bus	*/
+#else
+#error Config IDE: Unknown LinkStation type
+#endif
+
+#define CFG_ATA_BASE_ADDR	0
+
+#define CFG_ATA_DATA_OFFSET	0		/* Offset for data I/O		*/
+#define CFG_ATA_REG_OFFSET	0		/* Offset for normal registers	*/
+#define CFG_ATA_ALT_OFFSET	0		/* Offset for alternate registers */
+
+/*-----------------------------------------------------------------------
+ * Partitions and file system
+ */
+#define CONFIG_DOS_PARTITION
+
+/*-----------------------------------------------------------------------
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH	*/
+#define BOOTFLAG_WARM		0x02	/* Software reboot			*/
+
+#endif	/* __CONFIG_H */