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authorSimon Glass <sjg@chromium.org>2016-01-21 19:45:21 -0700
committerSimon Glass <sjg@chromium.org>2016-01-21 20:42:37 -0700
commit6406f453546cf9c398a6a94346c1d3ed570e7d7e (patch)
tree40355b412a9bbc31e109f67f65a6c3f7a02b6256
parent889b8a3147e5ea453297c117c911efb61f798c0f (diff)
rockchip: dts: Sync up SPDIF node with Linux
This has been added and we have references to it in the rock2 board. Add this node. Signed-off-by: Simon Glass <sjg@chromium.org>
-rw-r--r--arch/arm/dts/rk3288.dtsi21
1 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3288.dtsi b/arch/arm/dts/rk3288.dtsi
index fb1d1f7e1b..e51c75c150 100644
--- a/arch/arm/dts/rk3288.dtsi
+++ b/arch/arm/dts/rk3288.dtsi
@@ -631,6 +631,21 @@
status = "disabled";
};
+ spdif: sound@ff88b0000 {
+ compatible = "rockchip,rk3288-spdif", "rockchip,rk3066-spdif";
+ reg = <0xff8b0000 0x10000>;
+ #sound-dai-cells = <0>;
+ clock-names = "hclk", "mclk";
+ clocks = <&cru HCLK_SPDIF8CH>, <&cru SCLK_SPDIF8CH>;
+ dmas = <&dmac_bus_s 3>;
+ dma-names = "tx";
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spdif_tx>;
+ rockchip,grf = <&grf>;
+ status = "disabled";
+ };
+
i2s: i2s@ff890000 {
compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
reg = <0xff890000 0x10000>;
@@ -1417,6 +1432,12 @@
<4 3 3 &pcfg_pull_none>;
};
};
+
+ spdif {
+ spdif_tx: spdif-tx {
+ rockchip,pins = <RK_GPIO6 11 RK_FUNC_1 &pcfg_pull_none>;
+ };
+ };
};
power: power-controller {