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authorTetsuyuki Kobayashi <koba@kmckk.co.jp>2012-07-06 21:14:20 +0000
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 14:58:22 +0200
commit6f0dba85a92b55f67a3610241060caaa41b5939e (patch)
treee0bbc888c5d401a3661023bb736657cdaf3b637a
parentcca60769fc46ed27edbcb915f95351e6bb577ee0 (diff)
arm: bugfix: save_boot_params_default accesses uninitalized stack when -O0
save_boot_params_default() in cpu.c accesses uninitialized stack area when it compiled with -O0 (not optimized). This patch removes save_boot_params_default() and put the equivalent in start.S Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Acked-by: Tom Rini <trini@ti.com>
-rw-r--r--arch/arm/cpu/armv7/cpu.c7
-rw-r--r--arch/arm/cpu/armv7/start.S14
2 files changed, 14 insertions, 7 deletions
diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index f01989fbf5..39a80237cd 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -38,13 +38,6 @@
#include <asm/armv7.h>
#include <linux/compiler.h>
-void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
-{
-}
-
-void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
- __attribute__((weak, alias("save_boot_params_default")));
-
void __weak cpu_cache_initialization(void){}
int cleanup_before_linux(void)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index b06bafde91..32658eb7a5 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -305,6 +305,20 @@ ENDPROC(relocate_code)
/*************************************************************************
*
+ * void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
+ * __attribute__((weak));
+ *
+ * Stack pointer is not yet initialized at this moment
+ * Don't save anything to stack even if compiled with -O0
+ *
+ *************************************************************************/
+ENTRY(save_boot_params)
+ bx lr @ back to my caller
+ENDPROC(save_boot_params)
+ .weak save_boot_params
+
+/*************************************************************************
+ *
* cpu_init_cp15
*
* Setup CP15 registers (cache, MMU, TLBs). The I-cache is turned on unless