summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJagan Teki <jagan@amarulasolutions.com>2017-05-25 18:15:36 +0000
committerJagan Teki <jagan@amarulasolutions.com>2017-06-01 14:35:23 +0000
commit702a3e579b115b7e443773e56910a6b13d7ea7bf (patch)
treecc72662a2a3fec7d3a2118f42e1e0eef73308b19
parent2dbe9c1362c7481fac93524f65340a48c79eed9a (diff)
arm64: dts: sun50i: Add sun50i-h5.dtsi
The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses Cortex-A53 cores instead. So move the shared cpu based and peripherals nodes into sun50i-h5.dtsi so, that it can shared among the sun50i-h5 board dts files. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
-rw-r--r--arch/arm/dts/sun50i-h5-orangepi-pc2.dts34
-rw-r--r--arch/arm/dts/sun50i-h5.dtsi77
2 files changed, 78 insertions, 33 deletions
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
index de60f783d3..81594e622e 100644
--- a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
+++ b/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
@@ -42,40 +42,12 @@
/dts-v1/;
-#include "sun8i-h3.dtsi"
+#include "sun50i-h5.dtsi"
/ {
model = "OrangePi PC 2";
compatible = "xunlong,orangepi-pc-2", "allwinner,sun50i-h5";
- cpus {
- cpu@0 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu@1 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu@2 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- cpu@3 {
- compatible = "arm,cortex-a53", "arm,armv8";
- enable-method = "psci";
- };
- };
-
- psci {
- compatible = "arm,psci-0.2";
- method = "smc";
- };
-
- timer {
- compatible = "arm,armv8-timer";
- };
-
chosen {
stdout-path = "serial0:115200n8";
};
@@ -99,10 +71,6 @@
};
};
-&gic {
- compatible = "arm,gic-400";
-};
-
&mmc0 {
compatible = "allwinner,sun50i-h5-mmc",
"allwinner,sun50i-a64-mmc",
diff --git a/arch/arm/dts/sun50i-h5.dtsi b/arch/arm/dts/sun50i-h5.dtsi
new file mode 100644
index 0000000000..4904c18054
--- /dev/null
+++ b/arch/arm/dts/sun50i-h5.dtsi
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2016 ARM Ltd.
+ *
+ * This file is dual-licensed: you can use it either under the terms
+ * of the GPL or the X11 license, at your option. Note that this dual
+ * licensing only applies to this file, and not this project as a
+ * whole.
+ *
+ * a) This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * Or, alternatively,
+ *
+ * b) Permission is hereby granted, free of charge, to any person
+ * obtaining a copy of this software and associated documentation
+ * files (the "Software"), to deal in the Software without
+ * restriction, including without limitation the rights to use,
+ * copy, modify, merge, publish, distribute, sublicense, and/or
+ * sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following
+ * conditions:
+ *
+ * The above copyright notice and this permission notice shall be
+ * included in all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "sun8i-h3.dtsi"
+
+/ {
+ cpus {
+ cpu@0 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@1 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@2 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ cpu@3 {
+ compatible = "arm,cortex-a53", "arm,armv8";
+ enable-method = "psci";
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ };
+};
+
+&gic {
+ compatible = "arm,gic-400";
+};