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authorXiubo Li <Li.Xiubo@freescale.com>2014-11-21 17:40:55 +0800
committerYork Sun <yorksun@freescale.com>2014-12-11 09:41:45 -0800
commit73a1cb27c0d9e93d97cd7a344fd341f638ba3a2a (patch)
treeeb23effa0293214ada8f650877544efd5a18ce75
parentb8e5c7f94af6b178946ae01ba36ac7fac1e86ec7 (diff)
ARM: HYP/non-sec: Fix the ARCH Timer frequency setting.
For some SoCs, the system clock frequency may not equal to the ARCH Timer's frequency. This patch uses the CONFIG_TIMER_CLK_FREQ instead of CONFIG_SYS_CLK_FREQ, then the system clock macro and arch timer macor could be set separately and without interfering each other. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
-rw-r--r--arch/arm/cpu/armv7/nonsec_virt.S4
-rw-r--r--include/configs/sun7i.h1
2 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index 1ab5d54e30..30d81db8b8 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -169,11 +169,11 @@ ENTRY(_nonsec_init)
* we do this here instead.
* But first check if we have the generic timer.
*/
-#ifdef CONFIG_SYS_CLK_FREQ
+#ifdef CONFIG_TIMER_CLK_FREQ
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
- ldreq r1, =CONFIG_SYS_CLK_FREQ
+ ldreq r1, =CONFIG_TIMER_CLK_FREQ
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif
diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h
index f6b1b3edc1..4426d24e57 100644
--- a/include/configs/sun7i.h
+++ b/include/configs/sun7i.h
@@ -25,6 +25,7 @@
#define CONFIG_ARMV7_PSCI 1
#define CONFIG_ARMV7_SECURE_BASE SUNXI_SRAM_B_BASE
#define CONFIG_SYS_CLK_FREQ 24000000
+#define CONFIG_SYS_TIMER_CLK_FREQ CONFIG_SYS_CLK_FREQ
/*
* Include common sunxi configuration where most the settings are