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authorJoakim Tjernlund <joakim.tjernlund@infinera.com>2019-11-20 17:07:34 +0100
committerPriyanka Jain <priyanka.jain@nxp.com>2020-06-04 18:53:20 +0530
commit73af094c8444ea6affc607d3ca7704419b3fbfd8 (patch)
treeb56fb9a9bdc6de3a83ba20ef6eb16efce74635e9
parenta0f47e012fb679baa927feb3e673503c88083aa0 (diff)
ddr: fsl: Impl. Erratum A008109
Impl. erratum as descibed in errata doc. Enable A008109 for T1040 and T1024 Signed-off-by: Joakim Tjernlund <joakim.tjernlund@infinera.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
-rw-r--r--arch/powerpc/cpu/mpc85xx/Kconfig2
-rw-r--r--drivers/ddr/fsl/Kconfig3
-rw-r--r--drivers/ddr/fsl/ctrl_regs.c6
3 files changed, 11 insertions, 0 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig
index 6fc6ea8fef..5bd69d51cb 100644
--- a/arch/powerpc/cpu/mpc85xx/Kconfig
+++ b/arch/powerpc/cpu/mpc85xx/Kconfig
@@ -1038,6 +1038,7 @@ config ARCH_T1040
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
@@ -1061,6 +1062,7 @@ config ARCH_T1042
select SYS_FSL_DDR_VER_50
select SYS_FSL_ERRATUM_A008044
select SYS_FSL_ERRATUM_A008378
+ select SYS_FSL_ERRATUM_A008109
select SYS_FSL_ERRATUM_A009663
select SYS_FSL_ERRATUM_A009942
select SYS_FSL_ERRATUM_ESDHC111
diff --git a/drivers/ddr/fsl/Kconfig b/drivers/ddr/fsl/Kconfig
index 1b73df82de..f75d97b15c 100644
--- a/drivers/ddr/fsl/Kconfig
+++ b/drivers/ddr/fsl/Kconfig
@@ -151,6 +151,9 @@ endmenu
config SYS_FSL_ERRATUM_A008378
bool
+config SYS_FSL_ERRATUM_A008109
+ bool
+
config SYS_FSL_ERRATUM_A008511
bool
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c
index 2d3fb1953b..0e98ba4b4a 100644
--- a/drivers/ddr/fsl/ctrl_regs.c
+++ b/drivers/ddr/fsl/ctrl_regs.c
@@ -2628,6 +2628,12 @@ compute_fsl_memctl_config_regs(const unsigned int ctrl_num,
}
#endif
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008109
+ ddr->ddr_sdram_cfg_2 = ddr_in32(&ddr->ddr_sdram_cfg_2) | 0x800; /* DDR_SLOW */
+ ddr->debug[18] = ddr_in32(&ddrc->debug[18]) | 0x2;
+ ddr->debug[28] = 0x30000000;
+#endif
+
#ifdef CONFIG_SYS_FSL_ERRATUM_A009942
ddr_freq = get_ddr_freq(ctrl_num) / 1000000;
ddr->debug[28] |= ddr_in32(&ddrc->debug[28]);