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authorMarek Vasut <marex@denx.de>2015-07-20 03:26:05 +0200
committerMarek Vasut <marex@denx.de>2015-08-08 14:14:21 +0200
commit783fcf59bd12dc6ffd6e411dfcda387f7b7f2c72 (patch)
tree710e6f19d81bd8595386ad7322ec6db923d6de2f
parentba522c769e175c99087b4c5bc2c3134c6276f33e (diff)
ddr: altera: Clean up rw_mgr_mem_calibrate_read_test() part 5
Make the function documentation into kerneldoc. Signed-off-by: Marek Vasut <marex@denx.de>
-rw-r--r--drivers/ddr/altera/sequencer.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/drivers/ddr/altera/sequencer.c b/drivers/ddr/altera/sequencer.c
index 4585e37ce0..0d1e6c877c 100644
--- a/drivers/ddr/altera/sequencer.c
+++ b/drivers/ddr/altera/sequencer.c
@@ -1169,10 +1169,19 @@ static void rw_mgr_mem_calibrate_read_load_patterns(const u32 rank_bgn,
set_rank_and_odt_mask(0, RW_MGR_ODT_MODE_OFF);
}
-/*
- * try a read and see if it returns correct data back. has dummy reads
- * inserted into the mix used to align dqs enable. has more thorough checks
- * than the regular read test.
+/**
+ * rw_mgr_mem_calibrate_read_test() - Perform READ test on single rank
+ * @rank_bgn: Rank number
+ * @group: Read/Write group
+ * @num_tries: Number of retries of the test
+ * @all_correct: All bits must be correct in the mask
+ * @bit_chk: Resulting bit mask after the test
+ * @all_groups: Test all R/W groups
+ * @all_ranks: Test all ranks
+ *
+ * Try a read and see if it returns correct data back. Test has dummy reads
+ * inserted into the mix used to align DQS enable. Test has more thorough
+ * checks than the regular read test.
*/
static int
rw_mgr_mem_calibrate_read_test(const u32 rank_bgn, const u32 group,