diff options
| author | Jörg Krause <joerg.krause@embedded.rocks> | 2018-02-25 18:12:48 +0100 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2018-03-29 17:29:11 +0200 |
| commit | 7906ed4fdd70bb88ea8e6f47c404949a957f0890 (patch) | |
| tree | 997e62d263a03d1747ae3d25399abc1b46c176aa | |
| parent | e73edcf18c6751ef5e4809615d37520376d9a06e (diff) | |
ARM: dts: imx6ull: add wdog3
The i.MX6ULL has a WDOG3 located at start address 0x021E0000 in the
AIPS-2 memory region [1].
[1] i.MX 6ULL Applications Processor Reference Manual, Rev. 1, 11/2017,
Table 2-3. AIPS-2 memory map, p. 178
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
| -rw-r--r-- | arch/arm/dts/imx6ull.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6ull.dtsi b/arch/arm/dts/imx6ull.dtsi index 28b8422f31..f8ec649460 100644 --- a/arch/arm/dts/imx6ull.dtsi +++ b/arch/arm/dts/imx6ull.dtsi @@ -1026,6 +1026,14 @@ status = "disabled"; }; + wdog3: wdog@021e4000 { + compatible = "fsl,imx6ul-wdt", "fsl,imx21-wdt"; + reg = <0x021e4000 0x4000>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6UL_CLK_WDOG3>; + status = "disabled"; + }; + uart2: serial@021e8000 { compatible = "fsl,imx6ul-uart", "fsl,imx6q-uart", "fsl,imx21-uart"; |