diff options
| author | Ian Campbell <ijc@hellion.org.uk> | 2014-06-05 19:00:16 +0100 |
|---|---|---|
| committer | Ian Campbell <ijc@hellion.org.uk> | 2014-07-18 19:42:25 +0100 |
| commit | 7c48b015100eeff0e1bbb766394f7beca23afb48 (patch) | |
| tree | 28cd553892cdc0474b0df5d54161806e3a11ebd6 | |
| parent | abce2c6220c1f8f4b66e464adc1074e04a8f19eb (diff) | |
sunxi: use setbits_le32 to enable the DMA clock
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
Acked-by: Hans de Goede <hdegoede@redhat.com>
| -rw-r--r-- | arch/arm/cpu/armv7/sunxi/clock_sun4i.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c index 5a7da3c6bf..b8b16cff95 100644 --- a/arch/arm/cpu/armv7/sunxi/clock_sun4i.c +++ b/arch/arm/cpu/armv7/sunxi/clock_sun4i.c @@ -36,8 +36,7 @@ void clock_init_safe(void) CPU_CLK_SRC_PLL1 << CPU_CLK_SRC_SHIFT, &ccm->cpu_ahb_apb0_cfg); #ifdef CONFIG_SUN7I - writel(0x1 << AHB_GATE_OFFSET_DMA | readl(&ccm->ahb_gate0), - &ccm->ahb_gate0); + setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_DMA); #endif writel(PLL6_CFG_DEFAULT, &ccm->pll6_cfg); } |