diff options
| author | Keerthy <j-keerthy@ti.com> | 2020-03-04 10:09:59 +0530 |
|---|---|---|
| committer | Lokesh Vutla <lokeshvutla@ti.com> | 2020-03-06 12:53:00 +0530 |
| commit | 896cf0e20a33895369258cc13f4d716f97acc59f (patch) | |
| tree | b2fe542ccb213c24323f40e79fff32e1fe5b0538 | |
| parent | 4ca78154e103f27dd767b11ecc188d8f1059aa60 (diff) | |
arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations.
Signed-off-by: Keerthy <j-keerthy@ti.com>
| -rw-r--r-- | arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi | 12 | ||||
| -rw-r--r-- | arch/arm/dts/k3-j721e-r5-common-proc-board.dts | 14 |
2 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi index d422100d42..7b01e4204f 100644 --- a/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi +++ b/arch/arm/dts/k3-j721e-common-proc-board-u-boot.dtsi @@ -365,3 +365,15 @@ u-boot,dm-spl; }; }; + +&ospi1 { + u-boot,dm-spl; + + flash@0 { + u-boot,dm-spl; + }; +}; + +&mcu_fss0_ospi1_pins_default { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts index ebea9efa58..44da8eabc2 100644 --- a/arch/arm/dts/k3-j721e-r5-common-proc-board.dts +++ b/arch/arm/dts/k3-j721e-r5-common-proc-board.dts @@ -134,6 +134,20 @@ J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */ >; }; + + mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default { + u-boot,dm-spl; + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */ + J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */ + J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */ + J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */ + J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */ + J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */ + J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */ + J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */ + >; + }; }; &main_pmx0 { |