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authorBiwen Li <biwen.li@nxp.com>2020-05-01 20:04:19 +0800
committerPriyanka Jain <priyanka.jain@nxp.com>2020-05-04 09:12:36 +0530
commit8e4be6dfb755bda97bea4d4b211c4aaabe08b730 (patch)
tree336a073962174db68cd041f77255f23625eebdf1
parent30ea84768b678c64fbd890b952b719bf3b8d9dc0 (diff)
dm: powerpc: T2080/T2081: add i2c DM support
This supports i2c DM for SoC T2080/T2081 Signed-off-by: Biwen Li <biwen.li@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
-rw-r--r--arch/powerpc/dts/t2080.dtsi4
-rw-r--r--board/freescale/t208xqds/t208xqds.c19
-rw-r--r--include/configs/T208xQDS.h7
-rw-r--r--include/configs/T208xRDB.h10
4 files changed, 34 insertions, 6 deletions
diff --git a/arch/powerpc/dts/t2080.dtsi b/arch/powerpc/dts/t2080.dtsi
index 458019ae92..a9e9b404f6 100644
--- a/arch/powerpc/dts/t2080.dtsi
+++ b/arch/powerpc/dts/t2080.dtsi
@@ -3,7 +3,7 @@
* T2080/T2081 Silicon/SoC Device Tree Source (pre include)
*
* Copyright 2013 Freescale Semiconductor Inc.
- * Copyright 2018 NXP
+ * Copyright 2018,2020 NXP
*/
/dts-v1/;
@@ -96,6 +96,8 @@
sata-number = <2>;
sata-fpdma = <0>;
};
+ /include/ "qoriq-i2c-0.dtsi"
+ /include/ "qoriq-i2c-1.dtsi"
};
pcie@ffe240000 {
diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c
index 79cc1543f9..9100401022 100644
--- a/board/freescale/t208xqds/t208xqds.c
+++ b/board/freescale/t208xqds/t208xqds.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2009-2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
#include <common.h>
@@ -75,11 +76,23 @@ int checkboard(void)
return 0;
}
-int select_i2c_ch_pca9547(u8 ch)
+int select_i2c_ch_pca9547(u8 ch, int bus_num)
{
int ret;
+#ifdef CONFIG_DM_I2C
+ struct udevice *dev;
+
+ ret = i2c_get_chip_for_busnum(bus_num, I2C_MUX_PCA_ADDR_PRI, 1, &dev);
+ if (ret) {
+ printf("%s: Cannot find udev for a bus %d\n", __func__,
+ bus_num);
+ return ret;
+ }
+ ret = dm_i2c_write(dev, 0, &ch, 1);
+#else
ret = i2c_write(I2C_MUX_PCA_ADDR_PRI, 0, 1, &ch, 1);
+#endif
if (ret) {
puts("PCA: failed to select proper channel\n");
return ret;
@@ -90,7 +103,7 @@ int select_i2c_ch_pca9547(u8 ch)
int i2c_multiplexer_select_vid_channel(u8 channel)
{
- return select_i2c_ch_pca9547(channel);
+ return select_i2c_ch_pca9547(channel, 0);
}
int brd_mux_lane_to_slot(void)
@@ -368,7 +381,7 @@ int board_early_init_r(void)
printf("Warning: Adjusting core voltage failed.\n");
brd_mux_lane_to_slot();
- select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
+ select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT, 0);
return 0;
}
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 96801e5f09..aed2e87a1a 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2011-2013 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
/*
@@ -385,8 +386,8 @@ unsigned long get_board_ddr_clk(void);
/*
* I2C
*/
+#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
@@ -399,6 +400,10 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FSL_I2C2_SPEED 100000
#define CONFIG_SYS_FSL_I2C3_SPEED 100000
#define CONFIG_SYS_FSL_I2C4_SPEED 100000
+#endif
+
+#define CONFIG_SYS_I2C_FSL
+
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */
#define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index a90ea11a2f..e0ef2b25a1 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
+ * Copyright 2020 NXP
*/
/*
@@ -333,8 +334,8 @@ unsigned long get_board_ddr_clk(void);
/*
* I2C
*/
+#ifndef CONFIG_DM_I2C
#define CONFIG_SYS_I2C
-#define CONFIG_SYS_I2C_FSL
#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
#define CONFIG_SYS_FSL_I2C3_SLAVE 0x7F
@@ -347,6 +348,13 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_SYS_FSL_I2C2_SPEED 100000
#define CONFIG_SYS_FSL_I2C3_SPEED 100000
#define CONFIG_SYS_FSL_I2C4_SPEED 100000
+#else
+#define CONFIG_I2C_SET_DEFAULT_BUS_NUM
+#define CONFIG_I2C_DEFAULT_BUS_NUMBER 0
+#endif
+
+#define CONFIG_SYS_I2C_FSL
+
#define I2C_MUX_PCA_ADDR_PRI 0x77 /* I2C bus multiplexer,primary */
#define I2C_MUX_PCA_ADDR_SEC1 0x75 /* I2C bus multiplexer,secondary 1 */
#define I2C_MUX_PCA_ADDR_SEC2 0x76 /* I2C bus multiplexer,secondary 2 */