diff options
author | Aneesh V <aneesh@ti.com> | 2011-11-21 23:39:03 +0000 |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 23:59:34 +0100 |
commit | 9404758e9baf0472d6958efaa7df1aa757b237d8 (patch) | |
tree | e114f1d220da0c02c8dcc0fa672f9a3fb5cded9f | |
parent | 4324c118a03d8b957ef249e33313b6eafb580b41 (diff) |
omap4460: add ES1.1 identification
Signed-off-by: Aneesh V <aneesh@ti.com>
-rw-r--r-- | arch/arm/cpu/armv7/omap4/hwinit.c | 10 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-omap4/omap.h | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/omap_common.h | 1 |
3 files changed, 12 insertions, 1 deletions
diff --git a/arch/arm/cpu/armv7/omap4/hwinit.c b/arch/arm/cpu/armv7/omap4/hwinit.c index 52c9b19012..cd1451a0bf 100644 --- a/arch/arm/cpu/armv7/omap4/hwinit.c +++ b/arch/arm/cpu/armv7/omap4/hwinit.c @@ -146,7 +146,15 @@ void init_omap_revision(void) *omap4_revision = OMAP4430_ES2_3; break; case MIDR_CORTEX_A9_R2P10: - *omap4_revision = OMAP4460_ES1_0; + switch (readl(CONTROL_ID_CODE)) { + case OMAP4460_CONTROL_ID_CODE_ES1_1: + *omap4_revision = OMAP4460_ES1_1; + break; + case OMAP4460_CONTROL_ID_CODE_ES1_0: + default: + *omap4_revision = OMAP4460_ES1_0; + break; + } break; default: *omap4_revision = OMAP4430_SILICON_ID_INVALID; diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h index e9942574f2..4d8c89ffbd 100644 --- a/arch/arm/include/asm/arch-omap4/omap.h +++ b/arch/arm/include/asm/arch-omap4/omap.h @@ -63,6 +63,8 @@ #define OMAP4_CONTROL_ID_CODE_ES2_1 0x3B95C02F #define OMAP4_CONTROL_ID_CODE_ES2_2 0x4B95C02F #define OMAP4_CONTROL_ID_CODE_ES2_3 0x6B95C02F +#define OMAP4460_CONTROL_ID_CODE_ES1_0 0x0B94E02F +#define OMAP4460_CONTROL_ID_CODE_ES1_1 0x2B94E02F /* UART */ #define UART1_BASE (OMAP44XX_L4_PER_BASE + 0x6a000) diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index f1562ea4ab..913231b292 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -108,6 +108,7 @@ void spl_mmc_load_image(void); #define OMAP4430_ES2_2 0x44300220 #define OMAP4430_ES2_3 0x44300230 #define OMAP4460_ES1_0 0x44600100 +#define OMAP4460_ES1_1 0x44600110 /* omap5 */ #define OMAP5430_SILICON_ID_INVALID 0 |