diff options
| author | David Wu <david.wu@rock-chips.com> | 2019-04-16 21:56:34 +0800 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-05-08 17:34:12 +0800 |
| commit | 956362c84b0422ea99da947feca2878193c26ade (patch) | |
| tree | 3134cec5861254f1bfa750073e93305a19c36b4a | |
| parent | 625ab11fdae3daf346647aaba59abee804e34589 (diff) | |
pinctrl: rockchip: Special treatment for RK3288 gpio0 pins' drive strength
RK3288 pmu_gpio0 drive strength setting have no higher 16 writing
corresponding bits, need to read before write the register.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
| -rw-r--r-- | drivers/pinctrl/rockchip/pinctrl-rk3288.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/pinctrl/rockchip/pinctrl-rk3288.c b/drivers/pinctrl/rockchip/pinctrl-rk3288.c index 6ae9f1c76e..d1b9aeb3d9 100644 --- a/drivers/pinctrl/rockchip/pinctrl-rk3288.c +++ b/drivers/pinctrl/rockchip/pinctrl-rk3288.c @@ -143,8 +143,15 @@ static int rk3288_set_drive(struct rockchip_pin_bank *bank, return ret; } - /* enable the write to the equivalent lower bits */ - data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16); + /* bank0 is special, there are no higher 16 bit writing bits. */ + if (bank->bank_num == 0) { + regmap_read(regmap, reg, &data); + data &= ~(((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << bit); + } else { + /* enable the write to the equivalent lower bits */ + data = ((1 << ROCKCHIP_DRV_BITS_PER_PIN) - 1) << (bit + 16); + } + data |= (ret << bit); ret = regmap_write(regmap, reg, data); return ret; |